Displaying 20 results from an estimated 10000 matches similar to: "Question on Aliasing and invariant load hoisting"
2020 Sep 16
2
[Debuginfo] Changing llvm.dbg.value and DBG_VALUE to support multiple location operands
> That makes sense, and I think for "direct" values in your definition it is true that all direct values are r-values.
> Why do we need DW_OP_LLVM_direct when we already have DW_OP_LLVM_stack_value? Can you give an example of something that is definitely not a stack value, but direct?
The difference in definition is the intention: DW_OP_LLVM_direct means "we'd like this
2018 May 30
2
Help on finding Base GEP
Hi,
Below is the snippet of LLVM IR code generated by Flang
---snip--
%3 = getelementptr i64, i64* %"a$sd", i64 11, !dbg !16
%4 = bitcast i64* %3 to i32*, !dbg !16
%5 = load i32, i32* %4, align 4, !dbg !16, !tbaa !22
---snip--
My requirement is for any such LoadInst (example: %5), I want to check if
its base GEP (i.e. %3) loads at particular offset (11) from its
corresponding
2020 Sep 15
2
[Debuginfo] Changing llvm.dbg.value and DBG_VALUE to support multiple location operands
> That sounds to me to be the same concept that I am calling r-value vs. l-value. Do you agree, or is there some subtlety that I am missing?
I've been assuming that the l-value vs r-value distinction is analogous to C++: an l-value can be written to by the debugger, an r-value cannot. A memory location and a register location are both l-values, while implicit locations (stack
2020 Oct 07
2
[Debuginfo] Changing llvm.dbg.value and DBG_VALUE to support multiple location operands
> I don't see how this is a meaningful distinction in LLVM IR. In LLVM IR we only have SSA values. An SSA value could be an alloca, or a gep into an alloca, or spilled onto the stack at the MIR level, in which case the dbg.value should get lowered into a memory location (if it isn't explicitly a DW_OP_stack_value).
I think the distinction is still important; even at the IR level, if we
2018 May 30
1
Help on finding Base GEP
On 05/30/2018 06:04 AM, Siddharth Bhat via llvm-dev wrote:
> You can run SCEV which will see through bitcasts and GEPs, so it
> should give an expression of the form (base + offset) on the pointer
> of the load.
Specifically, you can use ScalarEvolution to subtract the expression for
the base descriptor from the expression for the loaded pointer and see
if the result is a SCEVConstant.
2020 Sep 11
2
[Debuginfo] Changing llvm.dbg.value and DBG_VALUE to support multiple location operands
> Can you elaborate what "direct" means? I'm having trouble understanding what the opposite (a non-exact value) would be.
Apologies, "exact" was a misleading/incorrect term. By direct, I mean that the expression computes the value of the variable, as opposed to its memory address, or the value that it points to. Within LLVM, where we don't have DW_OP_reg/DW_OP_breg
2020 Jun 19
2
Aliasing and forwarding optimization
----Snip--
struct st1{
int a;
};
struct st2{
int b;
};
struct st {
struct st1 obj1;
struct st2 obj2;
}Obj;
int test1(struct st1 * ptr1 , struct st2 * ptr2, struct st2 *ptr3) {
ptr1->a = 10;
*ptr3 = *ptr2;
return ptr1->a;
}
--Snip---
For the above case GCC is able to store forward the value 10 to the return
place.
LLVM is not doing this.
GCC
https://godbolt.org/z/FCjCXy
LLVM
2018 May 30
0
Help on finding Base GEP
You can run SCEV which will see through bitcasts and GEPs, so it should
give an expression of the form (base + offset) on the pointer of the load.
Cheers
siddharth
On Wed 30 May, 2018, 16:30 Venkataramanan Kumar via llvm-dev, <
llvm-dev at lists.llvm.org> wrote:
> Hi,
>
> Below is the snippet of LLVM IR code generated by Flang
>
> ---snip--
> %3 = getelementptr i64,
2020 Sep 02
2
[Debuginfo] Changing llvm.dbg.value and DBG_VALUE to support multiple location operands
> I'm not sure this will work as stated here. Indirectness is (mostly) orthogonal to DW_OP_stack_value. DW_OP_stack_value denotes that we reconstructed the value of the variable, but it doesn't exist in the program ("The DW_OP_stack_value operation specifies that the object does not exist in memory but its value is nonetheless known"), for example, a constant value. I think we
2017 Sep 06
4
RFC: Introduce DW_OP_LLVM_memory to describe variables in memory with dbg.value
On Wed, Sep 6, 2017 at 10:01 AM, David Blaikie <dblaikie at gmail.com> wrote:
> On Tue, Sep 5, 2017 at 1:00 PM Reid Kleckner via llvm-dev <
> llvm-dev at lists.llvm.org> wrote:
>
>> LLVM SSA values obviously do not have an address that we can take and
>> they don’t live in registers, so neither the default memory location model
>> nor DW_OP_regN make sense
2020 Aug 25
3
[Debuginfo] Changing llvm.dbg.value and DBG_VALUE to support multiple location operands
Currently there is a series of patches undergoing review[0] that seek to enable the use of multiple IR/MIR values when describing a source variable's location. The current plan for the MIR is to add a new instruction, DBG_VALUE_LIST, that supports this functionality by having a variable number of operands. It may be better however to simply replace the existing DBG_VALUE behaviour entirely
2017 Sep 07
2
RFC: Introduce DW_OP_LLVM_memory to describe variables in memory with dbg.value
On Wed, Sep 6, 2017 at 5:01 PM, David Blaikie <dblaikie at gmail.com> wrote:
> On Wed, Sep 6, 2017 at 2:01 PM Reid Kleckner <rnk at google.com> wrote:
>
>> On Wed, Sep 6, 2017 at 10:01 AM, David Blaikie <dblaikie at gmail.com>
>> wrote:
>>
>>> I guess you described this already, but talking it through for
>>> myself/maybe others will
2019 Jun 30
2
Information Loss of Array Type in Function Interface in IR Generated by Clang
Dear all,
Hi! Recently, I notice a situation where I cannot infer the size of the outermost dimension of array in the function interface.
To concretely depict the problem, I show the C source code and the generated IR code at the end. The array size of A[] is 51 but this information is lost in the generated IR.
How can I maintain such information in IR? Should I set some argument for
2017 Sep 05
7
RFC: Introduce DW_OP_LLVM_memory to describe variables in memory with dbg.value
Debug info today handles two cases reasonably well:
1. At -O0, dbg.declare does a good job describing variables that live at
some known stack offset
2. With optimizations, variables promoted to SSA can be described with
dbg.value
This leaves behind a large hole in our optimized debug info: variables that
cannot be promoted, typically because they are address-taken. This is
2020 Oct 06
2
[Debuginfo] Changing llvm.dbg.value and DBG_VALUE to support multiple location operands
> I can see how that could potentially be useful. I'm not sure how often we could practically make use of a situation like this, but I understand your motivation.
Indeed, I don't expect us to cancel out DWARF expressions like that very often. Although that edge case is likely to be very rare, the _direct operator itself will appear very frequently, as it would be used for every
2020 Sep 15
2
[Debuginfo] Changing llvm.dbg.value and DBG_VALUE to support multiple location operands
Hi Adrian & Stephen,
One thought here:
But — not all memory locations are l-values. If we have a DWARF location list for variable "x" which points to a memory address for the first n instructions and the switches to a constant for the remainder of the scope, the memory address is not guaranteed to be an l-value, because writing the the memory address cannot affect the later part of
2019 Nov 19
2
DW_OP_implicit_pointer design/implementation in general
> On Nov 18, 2019, at 8:33 AM, Jeremy Morse <jeremy.morse.llvm at gmail.com> wrote:
>
> Hi llvm-dev@,
>
> Switching focus to the LLVM implementation, the significant change is
> using dbg.value's first operand to refer to a DILocalVariable, rather
> than a Value. There's some impedance mismatch here, because all the
> documentation (for example in the
2019 Jun 30
2
Information Loss of Array Type in Function Interface in IR Generated by Clang
Dear David,
Thanks for your prompt reply!
Sure, I can implement a AST visitor to go through the AST to get the information but I just wonder whether there is any other way to let Clang do so.
What I am considering is how to let the generated IR looks like below, which some tools realize:
define dso_local i32 @_Z1fPii([51 x i32]* %A, i32 %x) local_unnamed_addr #0 !dbg !7 {
entry:
...
2020 Sep 10
2
LSR breaks debug info
The Loop Strength Reduction pass appears to break debug information even for
the most basic input. I believe this is a well known issue already (see
https://bugs.llvm.org/show_bug.cgi?id=38815) but I also believe that it deserve
some extra attention.
Consider the following input compiled with 'clang -g -O3 foo.c -mllvm -print-after-all'
---
void foo(unsigned char *p) {
#pragma clang loop
2019 Nov 15
2
TBAA question
What are you querying the alias analysis on in the above example - between
the load and store?
How are you creating your MemoryLocation for those too?
On Fri, Nov 15, 2019 at 6:03 AM Venkataramanan Kumar via llvm-dev <
llvm-dev at lists.llvm.org> wrote:
> Can someone please clarify me on this?
>
>
>
> On Wed, 13 Nov 2019 at 22:25, Venkataramanan Kumar <
>