Displaying 20 results from an estimated 1000 matches similar to: "llvm-config issues"
2019 Nov 22
2
Potential problem with -Wunreachable-code
Hello, hopefully this is the correct place to ask this...
We use distcc with clang++ and I have recently added -Wunreachable-code
to our set of warnings. The problem I am seeing is the compile fails
with (valid) unreachable code warnings on the slave, but passes (no
warning) locally. All machines have the same compiler version
clang version 8.0.1-svn369350-1~exp1~20190820121219.79
2011 Oct 02
7
[LLVMdev] LLVM and VHDL simulation
Hi,
I am wondering if someone knows about a VHDL simulator (maybe still in early developpement) that use LLVM in its compilation process.
To summarize, VHDL is a hardware description language, which means that VHDL is like any other programming language except that the output of its synthesis is not a list of assembly instructions but a description of a circuit with logical gates. This
2019 Feb 07
9
[8.0.0 Release] rc2 has been tagged
Dear testers,
8.0.0-rc2 has been tagged from the release_80 branch at r353413.
Please run the test script, share your results, and upload binaries.
I'll get the source tarballs and docs published as soon as possible,
and binaries as they become available.
Thanks,
Hans
2019 Feb 11
2
[cfe-dev] [8.0.0 Release] rc2 has been tagged
On Fri, Feb 8, 2019 at 9:53 AM Paweł Sikora via cfe-dev <
cfe-dev at lists.llvm.org> wrote:
> ----- Oryginalna wiadomość -----
> > Dear testers,
> >
> > 8.0.0-rc2 has been tagged from the release_80 branch at r353413.
>
> Hi,
>
> i've noticed a compile error with rc2 and libc++ (release_80 @svn). looks
> similar to
2019 Mar 12
6
[8.0.0 Release] rc5 has been tagged
Dear testers,
8.0.0-rc5 was just tagged from the release_80 branch at r355909.
This is identical to rc4 with the addition of r355743. Hopefully it is the
final release candidate, so please give it a good testing.
As usual, please run the test script, share your results, and upload
binaries.
I'll publish source tarballs and docs as soon as possible, and binaries as
they become available.
2019 Feb 27
5
[8.0.0 Release] rc3 has been tagged
Dear testers,
8.0.0-rc3 was just tagged from the release_80 branch at r355015.
We're running a little behind schedule now, but I think we're also
close to be able to call this done.
Please take a close look at this release candidate. Unless anything
bad comes up, this is probably very similar to what the final release
will look like.
Testers, please run the test script, share your
2019 Mar 18
4
[8.0.0 Release] The final tag is in
Dear testers,
The final version of 8.0.0 was just tagged from the release_80 branch
at r356364. It's identical to rc5 except for a few documentation
changes.
Apologies for being behind schedule. It took longer than planned this time.
Please build the final binaries and upload to the sftp.
For those following along: this means 8.0.0 is done, but it will take
a few days to get all the
2014 Sep 02
2
[LLVMdev] Python to VHDL using LLVM; was "Re: LLVMdev Digest, Vol 123, Issue 3"
The only VHDL to LLVM project that I know of is nvc. [0] I haven't
tried it personally and from a cursory look through the source it
seems like there is a LLVM backend and a "native" backend (not sure
what that means). If you're really crazy you might want to see if you
could massage GHDL [1] (VHDL GCC frontend) + DragonEgg [2] (LLVM
backend for GCC) to get you LLVM IR.
I'm
2019 Mar 12
2
[8.0.0 Release] rc4 has been tagged
Hans Wennborg wrote:
>Dear testers,
>
>8.0.0-rc4 was just tagged from the release_80 branch at r355690.
I've tested the current branch on SystemZ without problems.
I noticed I forgot to send a ReleaseNotes updates, sorry. If there's still
time, here's
a list of the major user-visible changes:
(See attached file: systemz-releasenotes.diff)
Mit freundlichen Gruessen / Best
2011 Oct 06
0
[LLVMdev] LLVM and VHDL simulation
On Sun, Oct 2, 2011 at 4:24 PM, Baggett Jonas <Jonas.Baggett at hefr.ch> wrote:
> Hi,
>
> I am wondering if someone knows about a VHDL simulator (maybe still in early developpement) that use LLVM in its compilation process.
> To summarize, VHDL is a hardware description language, which means that VHDL is like any other programming language except that the output of its synthesis
2019 Aug 12
3
'git llvm push' other branches?
Hi folks,
I want to update the Release Notes for the release/9.x, but seems like 'git llvm push' only supports commits to the master/trunk.
What's the current process for such patches?
Thanks,
Alex.
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2020 Apr 15
3
Introduce release tag into compiler-rt repo
Hi there,
Do we have any plan to add release tags to the compiler-rt git repo, say http://llvm.org/git/compiler-rt ?
Without a release tag I’m not sure which version of compiler-rt the llvm-project is using.
Take “LLVM 10.0.0 Release”( https://github.com/llvm/llvm-project/releases/tag/llvmorg-10.0.0) as an example:
The tarball of compiler-rt been used in this version is
2019 Jan 24
2
[cfe-dev] [8.0.0 Release] One week to the branch
On Thu, 24 Jan 2019, Hans Wennborg wrote:
> On Thu, Jan 24, 2019 at 3:51 AM Martin Storsjö <martin at martin.st> wrote:
>>
>> FWIW, I've got the main COFF functionality that I had planned on doing
>> committed in trunk by now. So at least for my own usecases, it's fully
>> functional by now. (And for unsupported options, it clearly errors out.)
>>
2019 Feb 11
2
[Release-testers] [8.0.0 Release] rc2 has been tagged
rc1 did not exhibit this mismatch. A repeat of the rc2 build repeated the
mismatch. I diff'd the disassembly between phase 2 and phase 3 and the
difference is the same on both builds. The difference follows:
# diff x86isel_p{2,3}.s
2c2
<
Phase2/Release/llvmCore-8.0.0-rc2.obj/lib/Target/X86/CMakeFiles/LLVMX86CodeGen.dir/X86ISelLowering.cpp.o:
file format elf64-x86-64
---
>
2009 Jun 12
2
Squaring one column of data
Hi,
A fairly basic problem I think, here although searching the inetrnet doesn't
seem to reveal a solution. I have a dataset with two columns of real
numbers. It is read in via read.table. I simply need to square the data in
the second column and then plot it. I have tried extracting the second
column (b <- z[2]) and then squaring it and merging it to a variable which
is the first column
2019 Jan 24
14
[8.0.0 Release] rc1 has been tagged
Dear testers,
8.0.0-rc1 was just tagged (from the branch at r351980).
It took a little longer than planned, but it's looking good.
Please run the test script, share your results, and upload binaries.
I'll get the source tarballs and docs published as soon as possible,
and binaries as they become available.
Thanks,
Hans
2006 May 31
0
Theora Decoding on FPGA
Hello people
My name is Felipe and I sent a proposal to the Google Summer of Code
that the goal is to get a FPGA embeded system decoding Theora Streams
in real-time.
It was accepted and the mentor is the Ralph Giles.
The proposal can be viewd here:
http://atlas.lsc.ic.unicamp.br/~portavales/wp-content/uploads/2006/05/soc_proposal.txt
There is also a presentation with a better division of the
2014 May 01
2
[LLVMdev] Ubuntu 14.04 Trusty packages broken
On 30/04/2014 12:50, Sylvestre Ledru wrote:
> On 30/04/2014 12:42, Adam Strzelecki wrote:
>> Hello,
>>
>> I don't know how it happened, but recent Ubuntu builds have broken -dev packages, which contain same libraries as non-dev packages.
>>
>>
>> dpkg: error processing archive /var/cache/apt/archives/libllvm3.5_1%3a3.5~svn207603-1~exp1_amd64.deb
2011 Aug 16
2
Filtering a table
Hello, I have a big table with 3 columns and 103918 rows. This is the example,
time species dbh
5 1 4.9377297
575 1 11.64127213
575 1 109.8182438
575 1 8.029809521
5 1 24.32501874
575 1 4.895992119
575 1 11.40567637
575 1 2.795090562
575 1 21.79281837
575 1 52.57476174
575 1 27.7290919
575 1 3.23262083
575 2 19.30612651
575 1
2007 May 01
5
[OT] Inject XML into page and tranform with XSL
Hi,
Is it possible to recieve an xml repsonse from my rails app, and then,
client side, inject the xml into the page without reloading and have it
apply an xslt? Like an AJAX call, but ajax is unavailable to me.
My very limited understanding suggests that xslt is only done at run time in
safari at least.
If I can''t get thsi to work the other option I''ve thought of is to use