similar to: How to enable AArch64 V8.3A support in clang?

When I pass an empty string for cpu and features to createTargetMachine, and then use LLVMGetTargetMachineCPU() and LLVMGetTargetMachineFeatureString() to get the strings back, they are still empty. Is there a way to have llvm compute the effective cpu/features string, and provide it so that I can inspect it? I'm trying to figure out how the cpu/features string that I am explicitly passing,

LLVM Weekly - #189, Aug 14th 2017 ================================= If you prefer, you can read a HTML version of this email at <http://llvmweekly.org/issue/189>. Welcome to the one hundred and eighty-ninth issue of LLVM Weekly, a weekly newsletter (published every Monday) covering developments in LLVM, Clang, and related projects. LLVM Weekly is brought to you by [Alex

Hi Manoj, Not too late at all, we have not got to that point of the work yet. Are there examples of this kind of build setup that are available publicly? I think I understand the problem but it'd help to see one in action. To see if there are any other Arm extensions that are already being added like this and whether those systems support GCC and how. Thanks, David Spickett.

Hi Manoj, I tried a few other options myself: * function 'target' attribute - the list of extensions this supports isn't complete and it doesn't enable the ACLE macros needed for intrinsics * manually defining ACLE macros - this allows intrinsics and is additive but assumes that you're not relying on codegen to emit instructions. I don't think it helps the bug linked

Since you're already set up for benchmarks, I would ask if you could benchmark the difference between using and not using the ARM64 inline assembly. I believe the original justification on ARMv7 for the assembly was the processor's panoply of multiply instructions and their long cycle times. It seems to me that the ARM64 processor is much more like an x86 one, where using a

One other minor thing: I notice that in the inline assembly the result (rd) is constrained as an earlyclobber operand. What was the reason for that?

> On Nov 19, 2015, at 5:47 PM, John Ridges <jridges at masque.com> wrote: > > Any speedup from the intrinsics may just be swamped by the rest of the encode/decode process. But I think you really want SIG2WORD16 to be (vqmovns_s32(PSHR32((x), SIG_SHIFT))) Yes, you?re right. I forgot to run the vectors under qemu with my previous version (oh, the embarrassment!) Fixed forthcoming

Hello, We would like to propose making LoopVectorize aware of SLP operations, to improve the generated code for loops operating on struct fields or doing complex math. At the moment, LoopVectorize uses interleaving to vectorize loops that operate on values loaded/stored from consecutive addresses: vector loads/stores are generated to combine consecutive loads/stores and then shufflevector

Hi all, Thanks to everyone's hard work over the last few months, the last child of the AArch64/ARM64 merge issue (http://llvm.org/PR19392) has just been resolved. So I think it's time to finish the job. I'd like to delete the AArch64 target and move ARM64 into its place: for now we'll accept both aarch64 and arm64 triples in all places, and they will all be redirected to the

Hi Jonathan, I'm sorry to bring this up again, and I don't want to beat a dead horse, but I was very surprised by your benchmarks so I took a little closer look. I think what's happening is that it's a little unfair to compare the ARM64 inline assembly to the C code, because looking at the C macros in "fixed_generic.h" for MULT16_32_Q16 and MULT16_32_Q15 you find

Any kind of distribution is OK, the following is what I tried: 1. debian-testing-arm64-netinst.iso 2. debian-8.6.0-arm64-CD-1.iso 3. debian-testing-arm64-DVD-1.iso The launch script doesn't make any output. 2016-11-30 21:05 GMT+08:00 David Chisnall <David.Chisnall at cl.cam.ac.uk>: > On 30 Nov 2016, at 13:02, 李阳 via llvm-dev <llvm-dev at lists.llvm.org> wrote: > >

Looks like your static library is not even pulled into the link command so the static library is not even in the snapshot. From the link command in the snapshot, the static library is not on the command line from snapshot: /Applications/Xcode-11.3.app/Contents/Developer/Toolchains/XcodeDefault.xctoolchain/usr/bin/ld -Z -demangle -object_path_lto

Thanks, I look forward to seeing what you find out. BTW, I was wondering if you tried replacing the SIG2WORD16 macro using the vqmovns_s32 intrinsic? I'm sure it would be faster than the C code, but in the grand scheme of things it might not make much difference. On 11/13/2015 12:15 PM, Jonathan Lennox wrote: >> On Nov 13, 2015, at 1:51 PM, John Ridges <jridges at masque.com>

On Thu, 2015-05-14 at 14:25 -0500, Jim Perrin wrote: > We've produced a disk image intended to help hardware vendors and > enthusiasts who are interested in bringing CentOS to their AArch64 based > platform. This allows a vendor to bypass the installer or to edit the > disk image before booting in order to test kernel modules or options. It > is intended for development purposes

Yes, I think so. And here I only want to know the result whether QEMU running the aarch64 operating system can compile the LLVM source code? Thanks! 2016-11-30 20:57 GMT+08:00 Renato Golin <renato.golin at linaro.org>: > On 30 November 2016 at 12:41, 李阳 via llvm-dev <llvm-dev at lists.llvm.org> > wrote: > > Now I came across the problem: I cannot launch the aarch64

Hi, I’ve stumbled across something curious with the Relase_40 I have built here: I tried to build for aarch64-apple-iphoneos, but ended up getting ELF objects $ clang -target aarch64-apple-iphoneos -c tmp.ll -o tmp.o warning: overriding the module target triple with aarch64-apple-iphoneos [-Woverride-module] 1 warning generated. bin $ file tmp.o tmp.o: ELF 64-bit LSB relocatable, ARM aarch64,

Hi Tim, I just read this thread and I see that you mentioned the buildbot and my name. > - LLVM test suite enabled in the buildbot and testing ARM64 (Gabor) What exactly I can do to help you with the merge process? Best regards, Gabor Ballabas -------------- next part -------------- An HTML attachment was scrubbed... URL:

Hi, Have you guys seen this? http://lab.llvm.org:8011/builders/clang-aarch64-lnt/builds/1522 There are a lot of commits in there, and I'm far away from ARM64 hardware for a few days, so if one of you guys could have a look, it'd be great. :) cheers, --renato

Hi Everyone, I'm working Chromium targeting Windows on ARM64 platform. As a part of this work I ran into an issue related to llvm in Swiftshader. Currently fixup_aarch64_movw relocation type is not supported for COFF ARM64 (AArch64WinCOFFObjectWriter). As far as I see, Microsoft hasn't defined indicator for this relocation type. I haven't seen documented anywhere. For AArch32

We've produced a disk image intended to help hardware vendors and enthusiasts who are interested in bringing CentOS to their AArch64 based platform. This allows a vendor to bypass the installer or to edit the disk image before booting in order to test kernel modules or options. It is intended for development purposes only, and will only continue through the alpha and beta test phases. ##