similar to: [RFC] New Clang target selection options for ARM/AArch64

Hi Manoj, Not too late at all, we have not got to that point of the work yet. Are there examples of this kind of build setup that are available publicly? I think I understand the problem but it'd help to see one in action. To see if there are any other Arm extensions that are already being added like this and whether those systems support GCC and how. Thanks, David Spickett.

Hi Manoj, I tried a few other options myself: * function 'target' attribute - the list of extensions this supports isn't complete and it doesn't enable the ACLE macros needed for intrinsics * manually defining ACLE macros - this allows intrinsics and is additive but assumes that you're not relying on codegen to emit instructions. I don't think it helps the bug linked

Hi Eli, Renato, Thanks for your feedback, there's a lot more to some of these things than I knew. I've addressed your points below. The overall summary is: - Start with converting the TargetParser to tableGen, with no user facing changes - Add warnings based on that, behind -Wall. Starting with command lines, since directives have larger implications that need investigation Thanks,

When I pass an empty string for cpu and features to createTargetMachine, and then use LLVMGetTargetMachineCPU() and LLVMGetTargetMachineFeatureString() to get the strings back, they are still empty. Is there a way to have llvm compute the effective cpu/features string, and provide it so that I can inspect it? I'm trying to figure out how the cpu/features string that I am explicitly passing,

Hi there, I am Software product developer at Robert Bosch, Germany. We are using armv8 64bit targets for our development. We have the need to do the cross compiling for our target on windows. I have compiled clang 5.0 from the vcs git. I have tried compiling the code with following options set: clang.exe -target armv8 -fslp-vectorize-aggressive -mfpu=neon -mfloat-abi=hard -c test.cpp As you

Tim, How about the below option ? 1. Specify an existing generic armv7 CPU or the CPU which is close my custom variant. My custom variant can be treated as "cortex-a9" + hwdiv. So my CPU here is "cortex-a9" 2. Specify the ".arch_extension idiv" which is available as an extension for my custom variant. 3. Teach LLVM & Clang about your CPU's

> > I assume with target you mean the backend? Consider the x86 backend. It > supports 32bit and 64bit mode, with the GNU x32 ABI in between. There > are three different executable formats support (ELF, PE, MachO) with > different constraints. Some platforms require 32bit alignment of the > stack, others require 128bit alignment. The list goes on. The triple > specifies >

Hi, Recently, I committed a patch adding default features for '-mcpu'. And after that, Eric replied me here's a proposal toward using '-march' instead of '-mcpu'. As it's half a year later from original proposal, some background may changes. One thing worth to mention is, during this time, Apple Contributed its backend and introduced another new CPU type: cyclone.

Folks, Following the discussion with Nico and others, I've created PR20683 to discuss about the implementation of a generic and externalised target specific parsing API for LLVM, Clang and others. I have a vague plan involving a generic class (say TargetParser) in lib/Target that is accessible as an API to any tool that needs target specific parsing. The idea is then to let targets implement

Hi, here's the canonical helloworld.c #include<stdio.h> int main() { printf("Hello World"); return 0; } In accordance with the cross-compilation LLVM documentation [1], I am trying to target the ARM on the Zedboard [2]. It is an ARM Cortex-A9. The machine I am compiling on is an x86_64 Fedora Linux machine, using clang 3.3. I am failing to generate an executable,

To give an update here, we actually are not missing a mapping. The code complains because we are copying around a fp16 into a gpr32 and that shouldn’t be done with a copy (default mapping). I extended the repairing code to issue G_ANYEXT in those cases instead of asserting. However, now, I have to teach instruction select about those ANYEXT otherwise we’ll fallback in that case. But that’s a

Thanks for the clarifications, Bob! I’ve spent some time with the head of the llvm.org repo, and I now understand a lot better what Renato and Tim were talking about re. the architecture aliases. The patch to add v6l, therefore, seems simple enough. I haven’t been able to test it in my usual flow, because that involves the whole swift stack. I’m considering creating a program that links to

On 26 November 2013 15:36, Rob Stewart <robstewart57 at gmail.com> wrote: > $ clang -v -target armv7a-linux-eabi -mcpu=cortex-a9 -mfloat-abi=soft > -mfpu=neon helloworld.c > Hi Rod, You need cross-binutils installed on your box. If you use Debian, there are packages (gcc-4.7-arm-linux-gnueabi and friends). Other distros may have similar packages, but you can always download the

Hi everyone, I'm a member engineer of linaro's llvm team,coming from Spreadtrum.I am a new person on LLVM.Now I'm writing a Target Parser for AArch64,so options parsing of AArch64 about cpu & arch & fpu can be summary to one place. In the TargetParser,we assume "aarch64" and "arm64" are synonyms of armv8a(as they are only for armv8a,people usually do

Hi Oliver, Thanks for trying this. Could you file a different PR for each of the problem you found and reference the umbrella PR: http://llvm.org/PR35347? <http://llvm.org/PR35347?> Thanks, -Quentin > On Nov 17, 2017, at 8:17 AM, Oliver Stannard <oliver.stannard at arm.com> wrote: > > Hi Quentin, > > One more reproducer, this time with small (<64bit) values

On 5 January 2016 at 10:55, Renato Golin <renato.golin at linaro.org> wrote: > On 5 January 2016 at 10:28, Tim Northover <t.p.northover at gmail.com> wrote: >> That's rather a hack, given that the 'l' actually has semantic >> meaning, but I suppose I could live with it. > > Not really. I disagree. "armv7l" is created specifically by Linux

On Sat, Mar 12, 2016 at 2:38 PM, Tim Northover <t.p.northover at gmail.com> wrote: > On 12 March 2016 at 11:51, Rail Shafigulin via llvm-dev > <llvm-dev at lists.llvm.org> wrote: > > I tried every possible combination of --target I could think of but > nothing > > worked. Would you mind helping me out? > > First, 64-bit x86 is "x86_64", and 32-bit

Hi Divacky, I have an armv7 variant that supports hardware division (extension). For my variant, I use ".cpu cortex-a9" and division attribute(.eabi_attribute 44, 2 @ Tag_DIV_use) to let the assembler do the right thing if it encounters a division instruction. With your path, the .cpu directive is used to fetch the available features of a CPU and ignores the eabi attributes. What

Hi, A64 versus A32/T32 code generation is controlled by the -target option which I don’t believe is under discussion here. James On 18 May 2016, at 13:17, Bruce Hoult <bruce at hoult.org<mailto:bruce at hoult.org>> wrote: Note that armv8a modifies the A32 and T32 instruction sets, and is therefore an important -march option for 32 bit code. Therefore armv8a can not be used to imply

Thanks all. Amara, could you take a look? > On Nov 20, 2017, at 3:06 AM, Oliver Stannard <oliver.stannard at arm.com> wrote: > > Hi Quentin, > > I’ve raised: > https://bugs.llvm.org/show_bug.cgi?id=35359 <https://bugs.llvm.org/show_bug.cgi?id=35359> > https://bugs.llvm.org/show_bug.cgi?id=35360 <https://bugs.llvm.org/show_bug.cgi?id=35360> >