similar to: How to get the possible predecessors for a PHINode

Hi folks, Hope this is not a silly question. But it bothers me when I am thinking about it. My question is: 1. In the implementation of serverSplitPHINodes(), why it only checks the first PHI node for possible multiple inputs from outside the region to extract. There could be more than one PHI nodes in the header block, and the code only checks the first one. I don't quite get it.

Hi, On Mon, May 1, 2017 at 8:47 AM, Daniel Berlin via llvm-dev <llvm-dev at lists.llvm.org> wrote: >> Today, the IR requires that if you have multiple edges from A to B >> (typically with a switch) any phi nodes in B must have an equal number of >> entries for A, but that all of them must have the same value. > >> This seems rather annoying.... >> 1) It

Hello all; So here is my goal: *** If there is a Call instruction to myFunction(int * val), I need to identify all the instructions that uses val in the IR and replace the uses with a newly created pointer. I will also be changing the argument of myFunction to the new pointer. int * val = malloc/calloc; ... myFunction(val); .... *val = 45; becomes== int * val = malloc/calloc; int * val1 =

I think I understood the problem you're trying to solve. I didn't, however, understand the problems you are having (maybe you're not running mem2reg?). I do have a little piece of code that I think does (more or less) what you want. Take a look at it, try understanding it, and see if it helps you out. You might have to change it a bit since you're replacing uses after an

Thanks for the reply. For the source code: int main() { int a = 0; int *p; p = &a; call_arnamoy(p); int *p1; p1 = p; return 1; } The bit code: %retval = alloca i32, align 4 %a = alloca i32, align 4 %p = alloca i32*, align 8 %p1 = alloca i32*, align 8 store i32 0, i32* %retval store i32 0, i32* %a, align 4 store i32* %a, i32** %p, align 8 %0 = load i32** %p, align 8 %call = call i32

Hi, I my case I needed to trace the execution of a specific .ll file. I wanted to know when a store and load instruction were executed. Maybe extending the Interpreter class was not the best option so I'm happy to hear suggestions. As a curiosity, why do you think that class should be rewritten? Thanks On Mon, Mar 4, 2019, 08:15 mayuyu.io <admin at mayuyu.io> wrote: > I dont quite

Hi all, I wrote code that compiled with llvm 2.8, but now I'm using llvm 2.9 and it doesn't compile anymore: My code looks like this: User *U; ... if (PHINode * phi = dyn_cast<PHINode>(U)) { ... BasicBlock * Pred = phi->getIncomingBlock(I); ... } And when I compile it with clang: Live.cc:130:27: error: member access into

Am Di., 17. März 2020 um 16:56 Uhr schrieb Chawla, Pankaj via llvm-dev <llvm-dev at lists.llvm.org>: > All I am expecting from DA is a direction vector containing (*). There seems to be a bug in DI, see Felipe's answer. > I think the main problem is that currently there is no exact way DA can query AliasAnalysis in a ‘conservatively correct’ manner. > > Using UnknownSize

Hi, I going through the Interpreter class source code and I think making almost all the visit methods (maybe not visitInstruction yet) would really help anybody that wants to create any sort of tracer or similar. Would be a patch in this case worthy? Thanks -------------- next part -------------- An HTML attachment was scrubbed... URL:

Hi, I've been writing an optimization pass (described on the ML previously). Sometimes this pass removes some case entries from switch instructions, which cause an abort because removeCase() doesn't fix the PHINodes predecessors when needed. e.g.: define i32 @foo() nounwind { ifthen: %call = call i32 @bar() switch i32 %call, label %myphi [ i32 0, label %ifelse i32 1, label

Nuno Lopes wrote: > PHINode should have one entry for each predecessor of its parent basic > block! > %ret.0 = phi i32 [ 0, %ifthen ], [ 1, %ifelse ] ; <i32> > [#uses=1] > Broken module found, compilation aborted! > > This is because myphi is not reachable from ifthen anymore. My question is: > is this a bug (or missing feature) or do I need to

The enlosed patch for IndVarSimplify.cpp works even when the pointer increment is deeply nested wrt pointer initialization, but note that it needs to have loop structures preserved, as in the following: int A[3000000], B[20000], C[100], Z; volatile int I, J, K; int main() { int i, j, k, *a, *b, *c; for ( a = &A[0], i = 0; i != 300; i++ ) { I++;

I now understand that IndVarSimplify.cpp is capable of reproducing array references when the pointer initialization from the array address is found inside the immediately enclosing loop, such that in the following code: int A[20000], B[100], Z; int main() { int i, j, *a, *b; for ( a = &A[0], i = 0; i != 200; i++ ) for ( b = &B[0], j = 0; j != 100; j++

Hello, This simple patch fixes PR9112: Index: lib/Analysis/ValueTracking.cpp =================================================================== --- lib/Analysis/ValueTracking.cpp (revision 125281) +++ lib/Analysis/ValueTracking.cpp (working copy) @@ -593,6 +593,8 @@ // Otherwise take the unions of the known bit sets of the operands, // taking conservative care to avoid

Hi However, frontend may also do various operations on the source code and one line number and column number could map to more than one binary address. Why LLVM IR cannot? Regrads Muhui 2018-06-12 23:18 GMT+08:00 mayuyu.io <admin at mayuyu.io>: > In theory that’s not exactly possible/accurate. Due to various operations > in the Backend like Instruction Legalization, one IR

I found a private ErrorStr member, but didn't find the get function of this member, could you tell me how I can get the error message? On Wed, Sep 18, 2019 at 4:02 PM mayuyu.io <admin at mayuyu.io> wrote: > Isn’t there a method in EngineBuilder to get the error message or > something? > I assume it’s you didn’t link in the JIT module > > Zhang > > 在

LLVM is built in Release mode. The version is 6.0.0. I think that a similar code worked on verison 3.9.0. It is probably a null pointer dereference occurring in eraseFromParent(). I checked and reconfirmed that the instruction had no uses. Perhaps I should rebuild LLVM. Thanks. On Wed, Aug 8, 2018 at 9:03 PM, mayuyu.io <admin at mayuyu.io> wrote: > Hmmmm that’s strange. Do you get an

Hi Surinder, I don't see anything obviously wrong with your code. I suggest that (1) you build LLVM with assertions enabled, (2) you run the verifier on your bitcode, and (3) run your program under valgrind. Ciao, Duncan. > I am getting a segmentation fault as soon as I touch the Basic block > *b value defined as : > > std::string getPHIAssigns(const PHINode *PH) > {

Hi Paul Thanks for your comments. Suppose I can generate the control flow graph via LLVM Pass or the default option like '-dot-cfg' with opt. However, the control flow graph is based on llvm IR level. I would like to have a control flow graph based on binary level. Thus, I want to map the IR to binary address. As far as I know, we used to use the debug information to map the IR to source

I'm running into an error message about PHINode which I don't understand too well. Hopefully I can explain this clearly. At a high level, I'm just trying to add a fprintf() statement at the end of functions to show me a timestamp. However, I also add an if/then such that I can turn the printing on/off. When using llvm-gcc, I've disabled linker and assembler optimizations in