similar to: how experimental are the llvm.experimental.vector.reduce.* functions?

The IR update to allow vector types was here: https://reviews.llvm.org/D57090 ...we didn't update the docs at that time because it was not clear what the backend would do with that, but that might've changed with some of the more recent patches. On Sat, Feb 9, 2019 at 1:42 AM Craig Topper via llvm-dev < llvm-dev at lists.llvm.org> wrote: > I don't think I understand your

On Sat, Feb 9, 2019 at 6:25 PM Simon Pilgrim <llvm-dev at redking.me.uk> wrote: > The add/sub (+mul) overflow intrinsics are being updated to support > vectors to match the related add/sub saturation intrinsics. We haven't > updated the docs yet as legalization, vectorization and various minor bits > of plumbing still need to be finished before it can be officially supported

Something like this should work I think. ; ModuleID = 'test.ll' source_filename = "test.ll" define void @entry(<4 x i32>* %a, <4 x i32>* %b, <4 x i32>* %x) { Entry: %tmp = load <4 x i32>, <4 x i32>* %a, align 16 %tmp1 = load <4 x i32>, <4 x i32>* %b, align 16 %tmp2 = add <4 x i32> %tmp, %tmp1 %tmpsign = icmp slt <4 x

I'm going to show the same function, first normally, and then as a coroutine, and show how gdb can see the variable when it's a normal function, but not when it's a coroutine. I'd like to understand if this can be improved. I'm trying to debug a real world problem, but the lack of debug info on variables in coroutines is making it difficult. Should I file a bug? Is this a

Hello, I wanted to ask one general question ( for now it is hard to check it manually, maybe there is a fast answer): can I construct an operation, say, addition, from operand_0 - 5 bits size and operand_1 - 3 bit size -> receive result as 6 bit size . I am basically reducing these sizes in the whole IR, so I want that all operands can have arbitrary sizes ( llvm pass is not really good because

When zig updated to llvm 5 we started hitting this assertion: zig: /home/andy/downloads/llvm-project/llvm/include/llvm/Support/Casting.h:106: static bool llvm::isa_impl_cl<To, const From*>::doit(const From*) [with To = llvm::Instruction; From = llvm::Value]: Assertion `Val && "isa<> used on a null pointer"' failed. I wonder if however this was caused by an

Can you please open a bug on bugzilla and attach the ir testcase? Your fix doesn't look right (just hiding the assertion failure) On Sep 17, 2017 10:45 AM, "Andrew Kelley via llvm-dev" < llvm-dev at lists.llvm.org> wrote: > What do you think about this patch? > > --- a/llvm/lib/Transforms/Scalar/NewGVN.cpp > +++ b/llvm/lib/Transforms/Scalar/NewGVN.cpp > @@

So, 90% of the time I've seen this, it was memory corruption, usually use after free. I know I fixed one after 5.0 branched. You should compile with address sanitizer enabled, and I suspect you will find the issue quicky. If not, we really need ir that reproduces it. On Sun, Sep 17, 2017, 12:27 PM Andrew Kelley via llvm-dev < llvm-dev at lists.llvm.org> wrote: > I think I forgot to

I have been working on a patch to add support for max/min reductions in LoopVectorize. One of the comments that came up in review is that the implementation could be simplified (and less fragile) if max and min intrinsics were recognized rather than looking for compare-select sequences. The suggestion was to change compare-selects into max and min intrinsic calls during instcombine. The

My problem with HFSC tc command is ... tc command''s HFSC have a lot parameter with 4 curve type SC curve -> umax dmax rate LS curve -> umax dmax rate RT curve -> umax dmax rate UL curve -> umax dmax rate so i''dont know which parameter are appropriate for my test case such real time class which curve are appropriate and good working result. my assumption about

Several instruction set architectures include arithmetic operations that can trap on overflow, or support this feature with a separate trap-on-overflow-flag instruction (such as the x86 INTO instruction). I am adding a back-end to the Open Dylan compiler to generate LLVM IR. The original back-end, which generates x86 machine code, makes use of the INTO instruction, and the runtime turns the

Hi, all. I have noticed that LLVM supports some Intrinsic Functions such as *"** llvm.sadd.with.overflow"* described in http://llvm.org/docs/LangRef.html#int_sadd_overflow. We can use these functions and needn't define the function bodies. For example, I can manually insert codes: * %res = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 %b) %sum = extractvalue

Hi guys, I just noticed that the LLVM has some node for signed/unsigned type( like udiv, sdiv), but why the ADD, SUB do not have the counter part sadd, uadd? best kevin

On Aug 9, 2010, at 10:44 AM, Peter S. Housel wrote: > Several instruction set architectures include arithmetic operations that can trap on overflow, or support this feature with a separate trap-on-overflow-flag instruction (such as the x86 INTO instruction). > > > I am adding a back-end to the Open Dylan compiler to generate LLVM IR. The original back-end, which generates x86

I'm trying to figure out how to plot basic utility maximization results with R, Ideally I'd like to plot the value of u through x1,x2 space, so you can graph income / substitution effects easily... also, it'd be nice if I could put a linear budget constraint on the graph here's an example with cobb douglas utility u <- function(x) { x1 <- x[1] x2 <- x[2]

Hi Sanjoy, Thanks for the reply! Your approach sounds good to me! I think 1) is legal as address wraparound in unsigned range doesn't make sense given a positive offset, but I am not sure. I think umax will not be added if we can prove the predicate as known. I am not sure whether umax will get simplified if we add nuw to the expressions. -Pankaj -----Original Message----- From: Sanjoy

declare i8 @llvm.atomic.load.max.i8.p0i8( i8* <ptr>, i8 <delta> ) declare i16 @llvm.atomic.load.max.i16.p0i16( i16* <ptr>, i16 <delta> ) declare i32 @llvm.atomic.load.max.i32.p0i32( i32* <ptr>, i32 <delta> ) declare i64 @llvm.atomic.load.max.i64.p0i64( i64* <ptr>, i64 <delta> ) declare i8 @llvm.atomic.load.min.i8.p0i8( i8* <ptr>, i8

I have a lot question about tc-command because now i''m doing research to compare performance between HTB and  HFSC so i''m doubt a lot thing and your reply are so very helpful to me ... My question is In HTB tc command question 1. I''m use opensource (Mastershaper) for help to config traffic control but when i''m try to config HTB, I''m doubt about

Hi, I'm using the Umax Astra 610p scanner (parallel port scanner). Unfortunately, it is not supported by sane as Umax is not publishing specs. Searching on google I found out that some people got it working using vmware but nobody could get it working with wine. That is surprising me because people seem to get lots of complicated windows applications working but not a small scanner

After chatting on IRC, Peter wants a very specific interrupt (int4 on x86). I suggested he add a new llvm.x86.int(i32) intrinsic, and use the existing branch on llvm.sadd.with.overflow intrinsic. The x86 backend can then turn jo+int4 into into when reasonable. -Chris On Aug 9, 2010, at 5:45 PM, Chris Lattner wrote: > > On Aug 9, 2010, at 10:44 AM, Peter S. Housel wrote: > >>