similar to: Modern Vector Instructions: Compilation & Code Generation & Hardware Design @ LLVM Compiler Social Zurich - Thursday Jan 10

Invitation accepted, I am happy to help out with reviews, like I did with the previous VP patches. And of course agreed that things should be well defined, and that we shouldn't paint ourselves in a corner, but I don't think that this is the case. And it's not that I am in a rush, but I don't think this change needs to be predicated on a big change landing first like the LV

Hi Simon, Thanks for reposting the example, and looking at it more carefully, I think it is very similar to my first proposal. This was met with some resistance here because it dumps loop information in the vector preheader. Doing it this early, we want to emit this in the vectoriser, puts a restriction on (future) optimisations that transform vector loops to honour/update/support this intrinsic

> You have similar problems with https://reviews.llvm.org/D79100 The new revision D79100<https://reviews.llvm.org/D79100> solves your comment 1), and I don't think your comments2) and 3) apply as there are no vendor specific intrinsics involved at all here. Just to quickly discuss the optimisation pipeline, D79100<https://reviews.llvm.org/D79100> is a small extension for the

Hi, I abandoned that approach and followed Eli's suggestion, see somewhere earlier in this thread, and emit an intrinsic that represents/calculates the active mask. I've just uploaded a new revision for D79100 that implements this. Cheers. ________________________________ From: Simon Moll <Simon.Moll at EMEA.NEC.COM> Sent: 18 May 2020 13:32 To: Sjoerd Meijer <Sjoerd.Meijer at

Lista aprovados Passo de Camaragibe: Chapad?o do Sul: ALINE RAQUEL BEZERRA LEITE, LEANDRO DO NASCIMENTO BATISTA, FERNANDO MONTEIRO DOS SANTOS, NEYLSON CAVALCANTE DOS SANTOS, JO?O CARLOS MOREIRA DE CARVALHO, CLEVILSON PEDRO FONSECA OLIVEIRA, MARIA DE FATIMA ALEIXO PINHEIRO, IVETE CORDEIRO DE SOUZA. SAMILLE DE OLIVEIRA CAVALCANTE, ELIS?NGELA DOS SANTOS SILVA, MAURY DE SIQUEIRA MELO PEREIRA, JOSEFA

Dear all, join us Thursday 19:00 at the Zurich Compiler Social! # Tech Talk: Learning a Static Analyzer from Data Abstract: To be practically useful, modern static analyzers must precisely model the effect of both, statements in the programming language as well as frameworks used by the program under analysis. While important, manually addressing these challenges is difficult for at least two

; RISC-V V & VE(*): ; %mask = get.active.lane.mask(%i, %i) ; %evl = min(256, %n - %i) ; MVE/SVE/AVX : ; %mask = get.active.lane.mask(%i, %n) ; %evl = call @llvm.vscale() For VE, we want to do as much predication as possible through %evl and as little as possible with %mask. This has performance implications on VE and RISC-V - VE does not generate a mask from %evl but %evl is

Hello Simon, Thanks for your replies, very useful. And yes, thanks for the example and making the target differences clear: ; Some examples: ; RISC-V V & VE(*): ; %mask = (splat i1 1) ; %evl = min(256, %n - %i) ; MVE/SVE : ; %mask = get.active.lane.mask(%i, %n) ; %evl = call @llvm.vscale() ; AVX: ; %mask = icmp (%i + (seq <8 x i32> 0,1,2,.,)), %n, ; %evl

On 11/6/20 12:39 PM, Sjoerd Meijer wrote: Hello Simon, Thanks for your replies, very useful. And yes, thanks for the example and making the target differences clear: ; Some examples: ; RISC-V V & VE(*): ; %mask = (splat i1 1) ; %evl = min(256, %n - %i) ; MVE/SVE : ; %mask = get.active.lane.mask(%i, %n) ; %evl = call @llvm.vscale() ; AVX: ; %mask = icmp (%i + (seq

On 11/6/20 8:49 AM, Roger Ferrer Ibáñez wrote: Hi Sjoerd, Trying to remember how everything fits together here, but could get.active.lane.mask not create the %mask of the VP intrinsics? Or in other words, in the vectoriser, who's producing the %mask and %evl that is consumed by the VP intrinsics? I'm not sure what would be the best way here. I think about the Loop Vectorizer. I imagine

Rela??o de aprovados Japaratinga: Tapurah: ANA CAROLINE LIMA VASCONCELOS, L?VIO CHAVES D?D?, FRANCISCO JACKSON DE FREITAS SOUZA, PAULO WILLAME ARAUJO DE LIMA, JO?O CARLOS MOREIRA DE CARVALHO, DAMI?O ROCHA DOS SANTOS J?NIOR, MARIA HELENA DE OLIVEIRA SILVA, JARDEL DE LIMA NOBRE. SILVANA BEZERRA DA SILVA, ARIELA DE MACEDO RICARDO, LUCAS PINTO ASSUNCAO, GLAUCIO VALENCA PEREIRA RANGEL, REBECA FARIAS

>when we have a mask loaded from an external source (memory, function call boundary, etc...) and a short sequence of vector ops Mask value from function call parameter is common. OpenMP declare simd function does exactly that for the masked cases. From: Philip Reames [mailto:listmail at philipreames.com] Sent: Thursday, January 31, 2019 4:05 PM To: Robin Kruppe <robin.kruppe at

Hi Sjoerd, > Trying to remember how everything fits together here, but could > get.active.lane.mask not create the %mask of the VP intrinsics? Or in other > words, in the vectoriser, who's producing the %mask and %evl that is > consumed by the VP intrinsics? > > I'm not sure what would be the best way here. I think about the Loop Vectorizer. I imagine at some point we

Hi, On 1/31/19 11:20 PM, Jacob Lifshay wrote: > We're in-progress designing a RISC-V extension > (http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2019-January/000433.html) > that would have variable-length vectors of short vectors (1 to 4): > <VL x <4 x float>> > where each predicate bit masks out a whole short vector. We're using > this extension

On 2/2/19 1:39 AM, Luke Kenneth Casson Leighton wrote: > > > On Friday, February 1, 2019, Simon Moll <moll at cs.uni-saarland.de > <mailto:moll at cs.uni-saarland.de>> wrote: > > We could untie the mask length from the data length: > >   %result = call <scalable 4 x float> > @llvm.evl.fsub.v4f32(<scalable 4 x float> %x, <scalable 4

For RISC-V V and VE being explicit about %evl is important for performance & correctness and that is what VP does. The get.active.lane.mask intrinsic is used as a hint for the MVE, SVE backends to use hardware tail-predication (the backends reverse engineer that hint by pattern matching for get.active.lane.mask in the mask parameter of "some" masked intrinsics). IMHO, it's more

On 2/5/19 1:27 AM, Philip Reames via llvm-dev wrote: > > On 1/31/19 4:57 PM, Bruce Hoult wrote: >> On Thu, Jan 31, 2019 at 4:05 PM Philip Reames via llvm-dev >> <llvm-dev at lists.llvm.org> wrote: >>> Do such architectures frequently have arithmetic operations on the >>> mask registers?  (i.e. can I reasonable compute a conservative >>> length

Jacob Lifshay <programmerjake at gmail.com> writes: > So it would be handy for the vector length on evl intrinsics to be in > units of the mask length so we don't have to pattern match a division > in the backend. We could have 2 variants of the vector length > argument, one in terms of the data vector and one in terms of the mask > vector. we could legalize the mask

Hi, There is now an RFC for a roadmap to native vector predication support in LLVM and a prototype implementation:   https://reviews.llvm.org/D57504 The prototype demonstrates: -  Predicated vector intrinsics with an explicit mask and vector length parameter on IR level. -  First-class predicated SDNodes on ISel level. Mask and vector length are value operands. -  An incremental strategy

We'll be at Tied House as usual, starting on Thursday the 5th at 7pm! If you can, help us plan and RSVP here: https://www.meetup.com/LLVM-Bay-Area-Social/events/kncsjlyxgbhb/ See everyone there! -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20180402/3fa54901/attachment.html>