Displaying 20 results from an estimated 200 matches similar to: "RFC: System (cache, etc.) model for LLVM"
2018 Nov 01
3
RFC: System (cache, etc.) model for LLVM
Am Do., 1. Nov. 2018 um 15:21 Uhr schrieb David Greene <dag at cray.com>>
> > thank you for sharing the system hierarchy model. IMHO it makes a lot
> > of sense, although I don't know which of today's passes would make use
> > of it. Here are my remarks.
>
> LoopDataPrefetch would use it via the existing TTI interfaces, but I
> think that's about it
2018 Nov 02
2
RFC: System (cache, etc.) model for LLVM
Am Do., 1. Nov. 2018 um 16:56 Uhr schrieb David Greene <dag at cray.com>:
> Ok. I would like to start posting patches for review without
> speculating too much on fancy/exotic things that may come later. We
> shouldn't do anything that precludes extensions but I don't want to get
> bogged down in a lot of details on things related to a small number of
> targets.
2017 Aug 28
0
regex - optional part isn't considered in replacement with gsub
"Please, consider that some SKUs have "-"
in the middle, for example: "PG-9021".
Then you need to include these in the list of patterns you gave. Try it
again -- this time with a **complete** list.
-- Bert
Bert Gunter
"The trouble with having an open mind is that people keep coming along and
sticking things into it."
-- Opus (aka Berkeley Breathed in his
2017 Nov 23
2
Addressing the problem of noisy GPUs under Nouveau
On 23/11/17 10:06, John Hubbard wrote:
> On 11/22/2017 05:07 PM, Martin Peres wrote:
>> Hey,
>>
>> Thanks for your answer, Andy!
>>
>> On 22/11/17 04:06, Ilia Mirkin wrote:
>>> On Tue, Nov 21, 2017 at 8:29 PM, Andy Ritger <aritger at nvidia.com> wrote:
>>> Martin's question was very long, but it boils down to this:
>>>
2020 Jul 22
2
New x86-64 micro-architecture levels
* Richard Biener:
> On Wed, Jul 22, 2020 at 10:58 AM Florian Weimer via Gcc <gcc at gcc.gnu.org> wrote:
>>
>> * Dongsheng Song:
>>
>> > I fully agree these names (100/101, A/B/C/D) are not very intuitive, I
>> > recommend using isa tags by year (e.g. x64_2010, x64_2014) like the
>> > python's platform tags (e.g. manylinux2010,
2020 Jul 22
3
New x86-64 micro-architecture levels
* Dongsheng Song:
> I fully agree these names (100/101, A/B/C/D) are not very intuitive, I
> recommend using isa tags by year (e.g. x64_2010, x64_2014) like the
> python's platform tags (e.g. manylinux2010, manylinux2014).
I started out with a year number, but that was before the was Level A.
Too many new CPUs only fall under level A unfortunately because they do
not even have AVX.
2017 Nov 23
2
Addressing the problem of noisy GPUs under Nouveau
Hey,
Thanks for your answer, Andy!
On 22/11/17 04:06, Ilia Mirkin wrote:
> On Tue, Nov 21, 2017 at 8:29 PM, Andy Ritger <aritger at nvidia.com> wrote:
>> Hi Martin,
>
> Martin should have complete answers,
>
>>
>> I was asked to clarify a few things:
>>
>> (1) Are all the user reports of loud fans on Fermi-era GPUs?
>
> Yes. Although I
2019 Mar 21
4
[PATCH] pci/quirks: Add quirk to reset nvgpu at boot for the Lenovo ThinkPad P50
[+cc Rafael]
On Wed, Mar 13, 2019 at 06:25:02PM -0400, Lyude Paul wrote:
> On Fri, 2019-02-15 at 16:17 -0500, Lyude Paul wrote:
> > On Thu, 2019-02-14 at 18:43 -0600, Bjorn Helgaas wrote:
> > > On Tue, Feb 12, 2019 at 05:02:30PM -0500, Lyude Paul wrote:
> > > > On a very specific subset of ThinkPad P50 SKUs, particularly
> > > > ones that come with a
2018 Jan 29
1
Addressing the problem of noisy GPUs under Nouveau
On 01/28/2018 04:05 PM, Martin Peres wrote:
> On 29/01/18 01:24, Martin Peres wrote:
>> On 28/11/17 07:32, John Hubbard wrote:
>>> On 11/23/2017 02:48 PM, Martin Peres wrote:
>>>> On 23/11/17 10:06, John Hubbard wrote:
>>>>> On 11/22/2017 05:07 PM, Martin Peres wrote:
>>>>>> Hey,
>>>>>>
>>>>>> Thanks
2018 Jan 28
3
Addressing the problem of noisy GPUs under Nouveau
On 28/11/17 07:32, John Hubbard wrote:
> On 11/23/2017 02:48 PM, Martin Peres wrote:
>> On 23/11/17 10:06, John Hubbard wrote:
>>> On 11/22/2017 05:07 PM, Martin Peres wrote:
>>>> Hey,
>>>>
>>>> Thanks for your answer, Andy!
>>>>
>>>> On 22/11/17 04:06, Ilia Mirkin wrote:
>>>>> On Tue, Nov 21, 2017 at 8:29
2019 Feb 15
3
[PATCH] pci/quirks: Add quirk to reset nvgpu at boot for the Lenovo ThinkPad P50
On Thu, 2019-02-14 at 18:43 -0600, Bjorn Helgaas wrote:
> Hi Lyude,
>
> On Tue, Feb 12, 2019 at 05:02:30PM -0500, Lyude Paul wrote:
> > On a very specific subset of ThinkPad P50 SKUs, particularly ones that
> > come with a Quadro M1000M chip instead of the M2000M variant, the BIOS
> > seems to have a very nasty habit of not always resetting the secondary
> >
2018 Nov 05
2
RFC: System (cache, etc.) model for LLVM
On Mon, 5 Nov 2018 at 15:56, David Greene <dag at cray.com> wrote:
> The cache interfaces are flexible enough to allow passes to answer
> questions like, "how much effective cache is available for this core
> (thread, etc.)?" That's a critical question to reason about the
> thrashing behavior you mentioned above.
>
> Knowing the cache line size is important
2019 Feb 12
7
[PATCH] pci/quirks: Add quirk to reset nvgpu at boot for the Lenovo ThinkPad P50
On a very specific subset of ThinkPad P50 SKUs, particularly ones that
come with a Quadro M1000M chip instead of the M2000M variant, the BIOS
seems to have a very nasty habit of not always resetting the secondary
Nvidia GPU between full reboots if the laptop is configured in Hybrid
Graphics mode. The reason for this happening is unknown, but the
following steps and possibly a good bit of patience
2019 Apr 24
1
[PATCH] pci/quirks: Add quirk to reset nvgpu at boot for the Lenovo ThinkPad P50
On Wed, Apr 24, 2019 at 03:16:37PM -0400, Lyude Paul wrote:
> On Wed, 2019-04-24 at 13:59 -0500, Bjorn Helgaas wrote:
> > Not being a scheduled work expert, I was unsure if this experiment was
> > equivalent to what I proposed.
> >
> > I'm always suspicious of singleton solutions like this (using
> > schedule_work() in runtime_resume()) because usually they
2019 Apr 04
4
[PATCH] pci/quirks: Add quirk to reset nvgpu at boot for the Lenovo ThinkPad P50
[+cc Hans, author of 0b2fe6594fa2 ("drm/nouveau: Queue hpd_work on (runtime) resume")]
On Fri, Mar 22, 2019 at 06:30:15AM -0500, Bjorn Helgaas wrote:
> On Thu, Mar 21, 2019 at 05:48:19PM -0500, Bjorn Helgaas wrote:
> > On Wed, Mar 13, 2019 at 06:25:02PM -0400, Lyude Paul wrote:
> > > On Fri, 2019-02-15 at 16:17 -0500, Lyude Paul wrote:
> > > > On Thu,
2017 Nov 13
4
Addressing the problem of noisy GPUs under Nouveau
Hello,
Some users have been complaining for years about their GPU sounding like
a jet engine at take off. Last year, I finally laid my hand on one of
these GPUs and have been trying to fix this issue on and off since then.
After failing to find anything in the HW, I figured out that the duty
cycle set by nvidia's proprietary driver would be way under the expected
value. By randomly changing
2019 Apr 24
2
[PATCH] pci/quirks: Add quirk to reset nvgpu at boot for the Lenovo ThinkPad P50
On Mon, Apr 15, 2019 at 02:07:18PM -0400, Lyude Paul wrote:
> On Thu, 2019-04-04 at 09:17 -0500, Bjorn Helgaas wrote:
> > [+cc Hans, author of 0b2fe6594fa2 ("drm/nouveau: Queue hpd_work on (runtime)
> > resume")]
> >
> > On Fri, Mar 22, 2019 at 06:30:15AM -0500, Bjorn Helgaas wrote:
> > > On Thu, Mar 21, 2019 at 05:48:19PM -0500, Bjorn Helgaas wrote:
2005 Jan 30
2
Wine tools problems?
Don't know if this is the right place to ask for winetools assistance,
but....
I installed the wt210jo rpm along with the latest wine rpm (20050111)
but whenever I try to launch the install for IE6 or any of the other
applications in Winetools, everything errors out, saying that it can't
find OLE32.DLL. Obviously I don't have any version of windows installed
anywhere (and this is
2011 May 03
5
[LLVMdev] Memory Subsystem Representation
For a while now we (Cray) have had some very primitive cache structure
information encoded into our version of LLVM. Given the more complex
memory structures introduced by Bulldozer and various accelerators, it's
time to do this Right (tm).
So I'm looking for some feedback on a proposed design.
The goal of this work is to provide Passes with useful information such
as cache sizes,
2011 May 03
0
[LLVMdev] Memory Subsystem Representation
On Tue, May 3, 2011 at 8:40 AM, David Greene <dag at cray.com> wrote:
> For a while now we (Cray) have had some very primitive cache structure
> information encoded into our version of LLVM. Given the more complex
> memory structures introduced by Bulldozer and various accelerators, it's
> time to do this Right (tm).
>
> So I'm looking for some feedback on a