similar to: Interest in fast BitVector?

Thank you. Is it possible to determine the liveout of the operands (see example bellow) ? %5 = add i32 %4, %3 For '%5': i can simply use " i->isUsedOutsideOfBlock() " For '%3' and '%4' : this is the question ... >From your answer, is it possible to determine *which* value is liveout ( in binary instruction)? On Sat, May 30, 2009 at 2:57 AM,

I believe Dan has added a pass to compute livein / liveout values. Evan Sent from my iPhone On May 30, 2009, at 5:03 AM, Rotem Varon <varonrotem at gmail.com> wrote: > Thank you. > > Is it possible to determine the liveout of the operands (see example > bellow) ? > > %5 = add i32 %4, %3 > > For '%5': i can simply use "

The pass you're referring to is in include/llvm/Analysis/LiveValues.h and lib/Analysis/LiveValues.cpp. It computes conservative approximations for specific liveness queries, rather than full livein/liveout information. It's intended to be used as a heuristic. Dan On May 30, 2009, at 3:51 PM, Evan Cheng wrote: > I believe Dan has added a pass to compute livein / liveout values. >

Is there an easy way to obtain all liveout variables of a basic block? Liveins can be found for each MachineBasicBlock, but I can only find liveouts for the whole function, at MachineRegisterInfo. Do I need to find them out manually?

Hi, How can i know, if a value have uses outside of the current basic block (liveout), without iterating through all the basic block ? Thanks. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20090530/71681bc2/attachment.html>

Because I feel bad for giving a non-answer: An easy way to find if a virtual register is alive after the basic block is to While iterating over the virtual registers - Check to see if the virtual register's "next" value exists outside of the basic block. for instance: std::vector<unsigned> findLiveOut( MachineBasicBlock * mbb ) { std::vector<unsigned> liveout; for(

I am working on a project where we are integrating an existing pre-RA scheduler into LLVM and we are trying to match our peak register pressure values with the machine instruction schedulers values while using X86. I am finding some mismatches in test cases like the one attached. The registers "AH" and "AL" are live-out but not live-in and I don't see that they are defined

On May 29, 2009, at 11:37 PM, Rotem Varon wrote: > How can i know, if a value have uses outside of the current basic > block (liveout), without iterating through all the basic block ? If the value is created within the basic block in question, and the block doesn't loop to itself, then you can just iterate through the uses and note if the use is an instruction in a different

On Jan 23, 1:51 pm, Roman Levenstein <romix.l... at googlemail.com> wrote: > Hi, > > Doing some profiling of llc, I noticed that some bitvector operations > took longer than usual. Then I noticed that too many copies of > BitVector obejcts are created, even when such operations like &=, ^=, > |= are performed on those bit vectors. > > I looked at the BitVector ADT

Hi, Doing some profiling of llc, I noticed that some bitvector operations took longer than usual. Then I noticed that too many copies of BitVector obejcts are created, even when such operations like &=, ^=, |= are performed on those bit vectors. I looked at the BitVector ADT implementation in BitVector.h and figured out that all assignment operations (except the usual assignment operator)

On May 30, 2009, at 5:03 AM, Rotem Varon wrote: > Is it possible to determine the liveout of the operands (see example > bellow) ? > > %5 = add i32 %4, %3 > > For '%5': i can simply use " i->isUsedOutsideOfBlock() " > For '%3' and '%4' : this is the question ... By definition, operands are live out if they're used in any

On Apr 2, 2008, at 10:11 PM, Xuehai Qian wrote: > Hi LLVMers, > I am a PHD student in CS dept in UIUC, I am doing a project for > Vikram's course, it is about PRE. I would like to know why you didn't > choose SSAPRE in LLVM, since it seems to be more suitable for LLVM (it > can operate directly on SSA form and avoid the conversion between SSA > and bit-vector). Can

On Apr 4, 2008, at 8:28 PM, Daniel Berlin wrote: > On Fri, Apr 4, 2008 at 5:58 PM, Vikram S. Adve <vadve at cs.uiuc.edu> > wrote: >> >> >> Dan, >> >> Doesn't the paper also assume the invariant that phi operands are >> effectively dead after the Phi, which is true right after SSA is >> constructed, but potentially not after

Hi LLVMers, I am a PHD student in CS dept in UIUC, I am doing a project for Vikram's course, it is about PRE. I would like to know why you didn't choose SSAPRE in LLVM, since it seems to be more suitable for LLVM (it can operate directly on SSA form and avoid the conversion between SSA and bit-vector). Can anyone tell me the reason? Xuehai

On Apr 4, 2008, at 4:51 PM, Daniel Berlin wrote: > On Fri, Apr 4, 2008 at 2:38 AM, Bill Wendling <isanbard at gmail.com> > wrote: >> On Apr 2, 2008, at 10:11 PM, Xuehai Qian wrote: >>> Hi LLVMers, >>> I am a PHD student in CS dept in UIUC, I am doing a project for >>> Vikram's course, it is about PRE. I would like to know why you >>>

Hi, I've noticed that the capacity of the disk in one of my VMs is completely wrongly reported by the python api. The image was transfered using scp but the transfer was aborted and now the api show a strange value: [root@virt83 ~]# du -h /var/lib/libvirt/images/test-disk1 706M /var/lib/libvirt/images/test-disk1 [root@virt83 ~]# ls -lh /var/lib/libvirt/images/test-disk1 -rw-r--r--. 1 root

On Fri, Apr 4, 2008 at 2:38 AM, Bill Wendling <isanbard at gmail.com> wrote: > On Apr 2, 2008, at 10:11 PM, Xuehai Qian wrote: > > Hi LLVMers, > > I am a PHD student in CS dept in UIUC, I am doing a project for > > Vikram's course, it is about PRE. I would like to know why you didn't > > choose SSAPRE in LLVM, since it seems to be more suitable for

On Fri, Apr 4, 2008 at 5:58 PM, Vikram S. Adve <vadve at cs.uiuc.edu> wrote: > On Apr 4, 2008, at 4:51 PM, Daniel Berlin wrote: > > > On Fri, Apr 4, 2008 at 2:38 AM, Bill Wendling <isanbard at gmail.com> > > wrote: > >> On Apr 2, 2008, at 10:11 PM, Xuehai Qian wrote: > >>> Hi LLVMers, > >>> I am a PHD student in CS dept in UIUC,

Hi @ll, over the past year we gained more experience with the patchpoint/stackmap/statepoint intrinsics and it exposed limitations in the stackmap format. The following proposal includes feedback and request from several interested parties and I would like to hear your feedback. Missing correlation between functions and stackmap records: Originally the client had to keep track of the ID to know

They cannot be found like the live in values because different values may be live out. For instance the psudocode may look like: BB0: vreg1 = rand() if( vreg1 > .5 ) goto BB1; else goto BB2; BB1: vreg 2 = rand(); EAX = copy vreg2; Return BB2: vreg 3 = rand() * rand()' EAX = copy vreg3; Return On Fri, Nov 5, 2010 at 7:41 AM, s Last namerc <srcsrc84 at yahoo.com>