Displaying 20 results from an estimated 2000 matches similar to: "Basic Coverage"
2018 Jun 26
2
Instruction boundaries
There should be a line-table entry for the end of the function, which appears to be missing from the dump you provided. llvm-dwarfdump should report this address with 'end_sequence' in the Flags. Are you using a different dumper?
I am not sure but my guess would be that inline data is not represented in the line table. The line table's primary purpose is to inform the debugger
2018 Jun 26
2
Instruction boundaries
I'm not familiar with the target instruction set, but if "MOV PC, R0" is not a return instruction, I'm guessing that the sequence starting at A39C is a dispatch through a jump table. The jump table would be considered part of the instruction stream and included in the scope of the line table. This is not a case where you would see end_sequence; my mistake.
The line table does
2018 Jun 26
2
Instruction boundaries
Hi paulr
Thanks for your reply. Though DWARF info give me the code address ranges,
there might be inline data. If so, how to handle this case?
As for the dwarf line table. Sometimes, the source line might be zero. Do
you know why? If all instructions should be describe in the line table, I
think analyzing Dwarf line table is enough to get all the instructions
addresses. Do you agree?
I would
2019 Jan 06
2
empty list assertion
sorry, ignore my earlier email.
I followed this:
https://stackoverflow.com/questions/42881901/how-to-compile-some-modules-in-llvm-with-debug-mode-others-with-release-mode
and got the debug build completed.
On Sat, Jan 5, 2019 at 10:02 AM Peter Teoh <htmldeveloper at gmail.com> wrote:
> will this help?
>
>
>
2008 Mar 15
1
extent_io.c: bio_add_page() error check for bio ptr
bio_add_page() requires non-NULL bio ptr for dereferencing.
Signed-off-by: Peter Teoh <htmldeveloper@gmail.com>
--- extent_io.c.orig1 2008-03-16 12:43:59.000000000 +0800
+++ extent_io.c 2008-03-16 12:45:03.000000000 +0800
@@ -1729,6 +1729,7 @@ static int submit_extent_page(int rw, st
if (bio_ret && *bio_ret) {
bio = *bio_ret;
+ BUG_ON(!bio);
2018 Sep 05
2
AddressSanitizer on SPECCPU2006
Hi Alex
Thanks for your email. But it seems not work. I removed the
-fsanitize=address flag.
The global buffer overflow message doesn't show. However, no *.sancov file
is created after I run perlbench. Thus, I could not get the BB coverage. Do
you have any ideas? Many Thanks
Regards
Muhui
Alexander Potapenko <glider at google.com> 于2018年9月5日周三 下午7:14写道:
> Hi Muhui,
>
> If
2008 Apr 25
2
reversing the effects of mkfs.btrfs?
I was playing around with btrfs, and did a mkfs.btrfs on one of my
partition. Mistakes, it was my data partition (ext3 based).
I have not yet mounted the device, but the mkfs.btrfs continued to
completion.
Is it possible to salvage my ext3 filesystem? Anyway to reverse the
effect of mkfs.btrfs?
Thank you for your help/answer.
--
Regards,
Peter Teoh
2009 Apr 02
5
Error in starting "wine file" in x86_64 FC10 env
First the following errors are logged in dmesg:
[ 31.891848] mtrr: base(0xc0000000) is not aligned on a
size(0xff00000) boundary
[ 32.343580] Xorg:3090 conflicting memory types c0000000-cff00000
uncached<->uncached-minus
[ 32.343585] reserve_memtype failed 0xc0000000-0xcff00000, track
uncached, req write-back
[ 32.344431] Xorg:3090 conflicting memory types fd000000-fe000000
2018 Jun 13
2
IR to binary address mapping
Hi Paul
Thanks for your comments. Suppose I can generate the control flow graph via
LLVM Pass or the default option like '-dot-cfg' with opt. However, the
control flow graph is based on llvm IR level. I would like to have a
control flow graph based on binary level. Thus, I want to map the IR to
binary address.
As far as I know, we used to use the debug information to map the IR to
source
2019 Jan 10
2
empty list assertion
In the definition of register classes, have you provided any value types
for each class?
-Krzysztof
On 1/9/2019 7:19 PM, m m via llvm-dev wrote:
> The file that is causing this assertion contains only 3 include statements
>
> |//===-- ABCOther.td - Describe the ABC Target Machine ----*- tablegen
> -*-===// // //
>
2018 Nov 03
2
llvm bug 36466 fix
Hi Dave
Sorry, I meant the hardware you're using to compile LLVM - you mentioned it
took you a long time to rebuild it so it would be hard for you to
write/experiment on tests.
=============================
Compiling LLVM doesn't take me too much time(less than 2 hours). The
hardware is good enough and I am using interl E5 CPU. What I mean is that
it took me a long time to analysis the
2018 Jun 03
2
Function start address
Hi Muhui,
I tried to grep the "DW_TAG_subprogram" from the debug_info . However, I noticed that the number I found is still less than the whole functions I found with LLVM IR. Do you have any experiences? Many Thanks
The only explanation that comes to mind, is that the functions are not in the final binary object file. However, previously you said you believed they were present. If
2018 Jun 02
2
Function start address
Hi
Actually, No particular reason. I just think this might be a solution, then
I use think kind of method. Querying the symbol table would be a good
choice, but I prefer to use LLVM and dwarf information. I am sorry that I
am not familiar with debug_info. But thanks to your suggestions. I would
like to try to solve it with debug_info. It seems work according to your
comments
By the way, I am
2018 Sep 05
2
AddressSanitizer on SPECCPU2006
Hi
If so, is it able to disable this check. All I need is just to get the BB
coverage information
Regards
Muhui
Alexander Potapenko <glider at google.com>于2018年9月5日 周三下午6:57写道:
> This is a known problem in SPECCPU2006, see
> https://github.com/google/sanitizers/wiki/AddressSanitizerFoundBugs
> On Wed, Sep 5, 2018 at 7:36 AM Muhui Jiang via llvm-dev
> <llvm-dev at
2018 May 29
3
LLVM Block is not the basic block
Hi
I am using the LLVM function pass to help me to do code analysis. I use
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20180529/a617b2c6/attachment.html>
2018 May 15
1
Four bitcode generated with plugin-opt=save-temps
Hi Teresa
Thanks for your very quick and clear explanation. I have one more question.
The emit-llvm option will give you the IR for a single source file when you
compile it with -c. All of those files when combined give the IR in the
preopt.bc temp file.
===========
So if I use "clang -emit-llvm -c" to generate the .ll file. It should be
the same as the one I generated by using
2018 Jul 01
2
Cross Compilation Problem
Hi Peter
I guess this is the document written by you
https://fosdem.org/2018/schedule/event/crosscompile/attachments/slides/2107/export/events/attachments/crosscompile/slides/2107/How_to_cross_compile_with_LLVM_based_tools.pdf
I follow it to try to use the clang to do cross compilation. Actually, my
target binaries is SPECCPU2006 and autotools based binaries.
However, I failed on the first
2018 May 30
1
LLVM IR source line error
Hi David
Thank you very much for your suggestions. ScopeLine works well. It could
represent the start of a function. Do you know whether I can get the start
column of this function? Many Thanks
Regards
Muhui
2018-05-30 3:25 GMT+08:00 David Blaikie <dblaikie at gmail.com>:
>
>
> On Tue, May 29, 2018 at 5:25 AM Muhui Jiang via llvm-dev <
> llvm-dev at lists.llvm.org>
2018 Jun 15
3
Strange Machineinstr
Hi Krzysztof
Thank you very much for your quick and clear reply. I know that MIR may not
match hardware instructions directly. However, I think the semantics should
be similar.
For example, the first instruction is a store-multiple instruction in ARM.
I think the first four MIR I shown should have the similar semantics with
the first three hardware instructions. I still cannot see the
2019 Jan 05
2
empty list assertion
Hi,
I'm trying to do a Debug build for the 1st time and I keep getting this assertion:
llvm-tblgen: CodeGenDAGPatterns.cpp:64: llvm::EEVT::TypeSet::TypeSet(llvm::ArrayRef<llvm::MVT::SimpleValueType>): Assertion `!VTList.empty() && "empty list?"' failed.
I do not know what list this assertion is referring to. Does anyone know? I always did Release builds before