similar to: Inline ASM ARM syntax to load immediate values with integrated assembler

Displaying 20 results from an estimated 3000 matches similar to: "Inline ASM ARM syntax to load immediate values with integrated assembler"

2013 Nov 01
2
[LLVMdev] Implementing the ldr pseudo instruction in ARM integrated assembler
On Nov 1, 2013, at 12:15 PM, David Peixotto <dpeixott at codeaurora.org> wrote: >>>>> I was thinking that without the .ltorg directive the constant pool >>>>> would go at the end of the section. >>>>> >>>> So where does the assembler place the constant pool(s) if that >>>> directive isn't present? I was under the
2013 Nov 01
2
[LLVMdev] Implementing the ldr pseudo instruction in ARM integrated assembler
On Nov 1, 2013, at 12:06 PM, David Peixotto <dpeixott at codeaurora.org> wrote: >>> I was thinking that without the .ltorg directive the constant pool >>> would go at the end of the section. >>> >> So where does the assembler place the constant pool(s) if that directive >> isn't present? I was under the impression it was always required. >
2013 Nov 01
0
[LLVMdev] Implementing the ldr pseudo instruction in ARM integrated assembler
> >>> I was thinking that without the .ltorg directive the constant pool > >>> would go at the end of the section. > >>> > >> So where does the assembler place the constant pool(s) if that > >> directive isn't present? I was under the impression it was always > required. > > > > From my understanding it is not required. I see
2013 Nov 01
8
[LLVMdev] Implementing the ldr pseudo instruction in ARM integrated assembler
In an earlier email[1] I proposed adding support for the ldr pseud-instruction to the ARM integrated assembler. After some discussion the overall consensus seemed to be that it was worth adding. One concern was that we needed to have adequate testing. I promised to provide more details on what the behavior should be and provide some tests before starting the implementation. The FileCheck-ified
2013 Nov 01
0
[LLVMdev] Implementing the ldr pseudo instruction in ARM integrated assembler
> There's still a problem for Darwin, or any other platform that use > subsections-via-symbols type layout tricks, though. There's no assembler- > time way to know how far apart the atoms in the section will be at > runtime, as the linker can, and will, move things around. Hmm, yes that does sound quite tricky. How do we currently deal with that for other pc-relative loads.
2013 Nov 01
0
[LLVMdev] Implementing the ldr pseudo instruction in ARM integrated assembler
Hi David, In these examples, I don’t see the directive that indicates where the assembler should place the constant pool? -Jim On Nov 1, 2013, at 11:16 AM, David Peixotto <dpeixott at codeaurora.org> wrote: > In an earlier email[1] I proposed adding support for the ldr > pseud-instruction to the ARM integrated assembler. After some discussion the > overall consensus seemed to be
2013 Nov 16
2
[LLVMdev] Implementing the ldr pseudo instruction in ARM integrated assembler
Moving discussion to llvm-commits now that I have a more developed implementation: http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20131111/195401. html > -----Original Message----- > From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On > Behalf Of David Peixotto > Sent: Tuesday, November 12, 2013 11:09 AM > To: 'Amara Emerson' >
2013 Dec 17
0
[LLVMdev] Implementing the ldr pseudo instruction in ARM integrated assembler
Hi David, Maybe I’m just blind, but where’s the code to handle the .ltorg directive? Is that a separate patch, maybe? Without that, this is not going to be usable in any circumstance using subsections-via-symbols. +typedef std::map<const MCSection *, ConstantPool> ConstantPoolMapTy; This feels odd to me. Can you elaborate a bit more on the data structure choices?? I would have expected
2013 Nov 01
0
[LLVMdev] Implementing the ldr pseudo instruction in ARM integrated assembler
> > I was thinking that without the .ltorg directive the constant pool > > would go at the end of the section. > > > So where does the assembler place the constant pool(s) if that directive > isn't present? I was under the impression it was always required. >From my understanding it is not required. I see that GCC will place it at the end of the section. I don't
2013 Oct 26
2
[LLVMdev] Add support for ldr pseudo instruction in ARM integrated assembler
From: Jim Grosbach [mailto:grosbach at apple.com] Sent: Friday, October 25, 2013 4:31 PM To: David Peixotto Cc: Renato Golin; LLVM Dev Subject: Re: [LLVMdev] Add support for ldr pseudo instruction in ARM integrated assembler On Oct 25, 2013, at 3:53 PM, David Peixotto <dpeixott at codeaurora.org> wrote: Hi Renato, Thanks for the thoughtful reply. Please find my thoughts below.
2013 Dec 17
2
[LLVMdev] Implementing the ldr pseudo instruction in ARM integrated assembler
Hi Jim, Thanks for the review. It seems like you were looking at an old patch. I've attached the latest patches to this email (and a squashed version of all three for easy reading). I believe many of your concerns were addressed. See below for a detailed response. > Maybe I'm just blind, but where's the code to handle the .ltorg directive? It is implemented in patch 0003 in this
2014 Feb 20
3
[LLVMdev] [LLVM] Forward temp label references on ARM in LDR with .ltorg in inline assembly are broken in trunk
I'm not entirely sure what caused this, but the following code, which used to behave as expected, is now broken: ---- lolwut.c ---------------------------- void lolwut(void) { __asm __volatile ( "ldr r1, =1f \n" ".ltorg \n" "1: \n\t" : : : "r0", "r1" ); } ------------------------------------------- ~/clang
2013 Oct 29
0
[LLVMdev] Add support for ldr pseudo instruction in ARM integrated assembler
On Oct 25, 2013, at 6:14 PM, David Peixotto <dpeixott at codeaurora.org> wrote: > From: Jim Grosbach [mailto:grosbach at apple.com] > Sent: Friday, October 25, 2013 4:31 PM > To: David Peixotto > Cc: Renato Golin; LLVM Dev > Subject: Re: [LLVMdev] Add support for ldr pseudo instruction in ARM integrated assembler > > > On Oct 25, 2013, at 3:53 PM, David Peixotto
2013 Nov 01
0
[LLVMdev] Implementing the ldr pseudo instruction in ARM integrated assembler
Hi David, > 8. Check that an error is issued when the constant pool would be placed too > far away I'd say this one is actually the most involved constraint but there don't actually seem to be any tests in the attached file for it. And I believe the directive Jim's referring to is ".ltorg". It's presumably going to have some interesting quirks of its own.
2013 Oct 25
0
[LLVMdev] Add support for ldr pseudo instruction in ARM integrated assembler
On Oct 25, 2013, at 3:53 PM, David Peixotto <dpeixott at codeaurora.org> wrote: > Hi Renato, Thanks for the thoughtful reply. Please find my thoughts below. > > -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation > > > From: Renato Golin [mailto:renato.golin at linaro.org] > Sent: Friday, October 25, 2013 1:11 PM
2013 Oct 25
3
[LLVMdev] Add support for ldr pseudo instruction in ARM integrated assembler
Hi Renato, Thanks for the thoughtful reply. Please find my thoughts below. -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation From: Renato Golin [mailto:renato.golin at linaro.org] Sent: Friday, October 25, 2013 1:11 PM To: David Peixotto Cc: LLVM Dev; Logan Chien; Gabor Ballabas; Rafael Espíndola; Richard Barton; Amara Emerson Subject:
2013 Nov 12
2
[LLVMdev] Implementing the ldr pseudo instruction in ARM integrated assembler
Hi David, Thanks for your efforts here. I have a few comments on your patch, although I realise it's still a work in progress. +class ConstantPool { + MCSymbol *Label; + typedef std::vector<const MCExpr*> EntryVecTy; Use a SmallVector here? + MCSymbol *getLabel() {return Label;} + size_t getNumEntries() {return Entries.size();} + const MCExpr *getEntry(size_t Num) {return
2013 Nov 01
2
[LLVMdev] Implementing the ldr pseudo instruction in ARM integrated assembler
Hi Tim, > > 8. Check that an error is issued when the constant pool would be > > placed too far away > > I'd say this one is actually the most involved constraint but there don't > actually seem to be any tests in the attached file for it. I put the test in a separate file and forgot to attach it earlier. I've attached it to this email. I can't say how
2013 Nov 12
0
[LLVMdev] Implementing the ldr pseudo instruction in ARM integrated assembler
Hi Amara, Thanks for your suggestions. I have made the changes you suggested and added a new test to check that we print an error when parsing a non-ldr mnemonic with an operand containing `=`. The updated patch is attached. -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation > -----Original Message----- > From: Amara Emerson
2010 Dec 18
1
Can I make my colnames bold?
Hello forum! As the subject indicates, I am trying to make a barplot and would like my column names to be in bold. Is this possible in R without having to make my column names in mtext? Any help would be much appreciated. The code I am using is as follows. par(mar=c(3,8,2,2)) par(adj=.5) par(font=2) par(oma=c(3,3,3,3)) par(xpd=TRUE) Blot<-matrix(c(25.2995, 0.7625, 25.6135, 36.5770,