similar to: Transpiler Question

Hi LLVM developers, As one of the maintainers of AVR target, I want to update WritingAnLLVMBackend document to be familiar with the development of backend, because: 1. The structure of LLVMTargetMachine https://github.com/llvm-mirror/llvm/blob/master/docs/WritingAnLLVMBackend.rst#target-machine has been changed a lot! 2. LLVMInitializeSparcTargetInfo

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Hello devs, I'd like to ask for some advise about adding a backend. I followed the steps at http://llvm.org/docs/WritingAnLLVMBackend.html (also adding the backend to the configure script, so it compiles (on Linux) with LLVM 3.1. However, llvm-build fails with: llvm[0]: Constructing LLVMBuild project information. Usage: llvm-build [options]

On 7/13/2020 21:30, Thomas Lively via llvm-dev wrote: > Part of the problem is that ISel patterns are like their own DSL inside > the TableGen DSL, so keywords like "ins", "outs", and "ops" aren't > keywords at the TableGen level, but rather at the level of the ISel > system implemented with TableGen. Copying existing patterns and reading > the

Thank You. On Fri, Jul 7, 2017 at 10:03 AM, Craig Topper <craig.topper at gmail.com> wrote: > Yes, that error is from instruction selection. I think your legalization > changes worked fine. > > ~Craig > > On Thu, Jul 6, 2017 at 8:21 PM, hameeza ahmed via llvm-dev < > llvm-dev at lists.llvm.org> wrote: > >> also i further run the following command;

Hi, We have some DSP architectures (kalimba) which have 24-bits as their "minimum addressable unit". So this means that the sizeof a char (and an int and a short for that matter) is 24-bits. I quickly read the posted link WritingAnLLVMBackend.html but did not see an obvious answer to the following question: Is it possible to write a backend that faithfully represents these

How does LLVM generate machine code for different architectures? For example, the machine code for x86 and amd will vary. How does LLVM convert its IR to machine code for different architectures.Can you please explain the approach? Is it just write two different programs for two different architectures and pass a flag to the compiler based on which machine code you want to generate? Thanks a lot

I want to write a simple backend-specific instrinsic that will just call an instruction. How should I do that? -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20180924/7faeeb3d/attachment.html>

Hi Johnny, Thanks for this - particularly the tip about cfe-dev. I'm currently trying to coerce lldb to debug these type of architectures (our current toolchain already outputs good dwarf info). However, I'm struggling since lldb has just assumes that the size of a byte is universally 8-bits. At some stage, I *think* at some stage we'd like to derive a compiler, from the "same

In attempting to add a backend I came across the documentation here: http://llvm.org/docs/WritingAnLLVMBackend.html The section on the build system seems to be out of date, or maybe I don't understand it. I copied the Sparc target to a directory (Foo for the example), added Foo to the subdirectories list in llvm\lib\Target\LLVMBuild.txt and to LLVM_ALL_TARGETS in llvm\CMakeLists.txt. I

Here's a patch for WritingAnLLVMBackend.html that describes how instruction operand mapping works based on an IRC chat I had. Can someone review and apply it? -------------- next part -------------- An embedded and charset-unspecified text was scrubbed... Name: write.patch URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20081120/c67a72f8/attachment.ksh>

Hello all, I am a beginner of LLVM and want to add a new Target for LLVM. I follow the document (http://llvm.org/docs/WritingAnLLVMBackend.html) to modify autotools/configure.ac. However when I type ./AutoRegen.sh There is an error that "Your autoconf was not detected as being 2.60" I download the source of autoconf 2.60 and install it. And there is the other error that "Your

Yes, llvm::InitializeAllTargetMCs(void) does seem to be autogenerated. It is _LLVMInitializeFooTargetMC that I can't find documented anywhere. On Sat, Mar 14, 2015 at 12:05 AM, Anton Korobeynikov < anton at korobeynikov.info> wrote: > This function is autogenerated. You need also to change top-level > configure / cmake files. > > On Sat, Mar 14, 2015 at 8:38 AM, Daniel

Hi LLVM developers, GCC[1] is able to use Loongson ISA[2] for instruction selection: $ cat hello.c #include <stdio.h> int main(int argc, char *argv[]) { printf("Hello World\n"); return 0; } $ gcc -O0 -S hello.c $ cat hello.s .file 1 "hello.c" .section .mdebug.abi64 .previous .nan legacy .gnu_attribute 4, 1 .abicalls

Dear all, I use the clang frontend to produce the control flow graph of a C program through this command: clang -Xclang -analyze -Xclang -analyzer-checker=debug.DumpCFG test.c The produced information contains all the basic blocks identified by labels, e.g. B1, B2, etc. along with their predecessors and successors. Is there a way to get the starting address of each of these basic block? I would

Dear LLVM experts! we would like to use BeignetBackend as and LLVM Target It shown in teh Beignet code there is a note "Well, the complete code base is somehow a compiler backend for LLVM. Here, we really speak about the final code generation passes that you may find in `src/backend`." http://www.freedesktop.org/wiki/Software/Beignet/Backend/compiler_backe nd/ But Beignet does not

i'd like to know if there is any plan or existing work to add a Aho's trig language like code generator generator? "...If you are starting a new port, we recommend that you write the instruction selector using the SelectionDAG infrastructure." any other things i should know before i write one? thank you.

Hi Patrik, Thanks for this note. It's encouraging to read there has been some provision made for non-8-bit bytes. I'm not a compiler/backend expert, (although maybe I'll need to be soon!), so I won't look at the patches right now, however may at some stage in the future myself or colleague may request these patches from yourself. Yes, our 24-bit architectures have non-power-of-2

On Wednesday 24 February 2010 03:58:03 Jianzhou Zhao wrote: > I think LLVM OCaml bindings do not support JIT too much. Can you elaborate on this? Several major projects are using OCaml's LLVM bindings to execute non-trivial code via JIT. -- Dr Jon Harrop, Flying Frog Consultancy Ltd. http://www.ffconsultancy.com/?e

Hi, I'm developing a very basic new LLVM backend for a RISC machine (named Risco), based on the existing Sparc and Mips backends and the main tutorial [1]. I'm having trouble registering the backend so the main tools can see it. My project code is outside the source tree, and I've altered the Makefile to generate a shared library for the backend (libLLVMRiscoCodeGen.so). I've

Hi all, i'm just starting out with LLVM (although i've been observing its evolution since that first release some years ago :) I would like to develop a backend for a generic assembly-like language, called NAC (N-Address Code). More info on NAC can be found here: http://www.nkavvadias.com/hercules/nac-refman.html (HTML) http://www.nkavvadias.com/hercules/nac-refman.pdf (PDF) You