similar to: Legacy Loop Pass Manager question

Displaying 20 results from an estimated 700 matches similar to: "Legacy Loop Pass Manager question"

2017 Dec 21
2
Pass ordering - GVN vs. loop optimizations
Hi, This is Ariel from the Rust team again. I am having another pass ordering issue. Looking at the pass manager at https://github.com/llvm-mirror/llvm/blob/7034870f30320d6fbc74effff539d946018cd00a/lib/Transforms/IPO/PassManagerBuilder.cpp (the early SimplifyCfg now doesn't sink stores anymore! I can't wait until I can get to use that in rustc!) I find that the loop optimization group
2019 May 13
2
Is it possible to reproduce the result of opt -O3 manually?
I think this has to do with how the pass manager is populated when we give -O3 vs when we give particular pass names. Some passes have multiple createXYZPass() methods that accept arguments too. These methods call non-default pass constructors, which in turn cause the passes to behave in a different manner. eg: Pass *llvm::createLICMPass() { return new LegacyLICMPass(); } Pass
2013 Jul 18
3
[LLVMdev] IR Passes and TargetTransformInfo: Straw Man
Andy and I briefly discussed this the other day, we have not yet got chance to list a detailed pass order for the pre- and post- IPO scalar optimizations. This is wish-list in our mind: pre-IPO: based on the ordering he propose, get rid of the inlining (or just inline tiny func), get rid of all loop xforms... post-IPO: get rid of inlining, or maybe we still need it, only
2013 Apr 17
1
[LLVMdev] [polly] pass ordering
----- Original Message ----- > From: "Tobias Grosser" <tobias at grosser.es> > To: "Sebastian Pop" <spop at codeaurora.org> > Cc: llvmdev at cs.uiuc.edu > Sent: Wednesday, April 17, 2013 12:45:26 PM > Subject: Re: [LLVMdev] [polly] pass ordering > > On 04/17/2013 05:53 PM, Sebastian Pop wrote: > > Hi, > > > > polly is run very
2013 Jul 28
0
[LLVMdev] IR Passes and TargetTransformInfo: Straw Man
Hi, Sean: I'm sorry I lie. I didn't mean to lie. I did try to avoid making a *BIG* change to the IPO pass-ordering for now. However, when I make a minor change to populateLTOPassManager() by separating module-pass and non-module-passes, I saw quite a few performance difference, most of them are degradations. Attacking these degradations one by one in a piecemeal manner is wasting
2016 Oct 12
2
Loop Unrolling Fail in Simple Vectorized loop
Hi all, Attached herewith is a simple vectorized function with loops performing a simple shuffle. I want all loops (inner and outer) to be unrolled by 2 and as such used -unroll-count=2 The inner loops(with k as the induction variable and having constant trip counts) unroll fully, but the outer loop with (j) fails to unroll. The llvm code is also attached with inner loops fully unrolled. To
2013 Apr 17
2
[LLVMdev] [polly] pass ordering
Tobias Grosser wrote: > As said before, we could probably add it in between those two passes: > > MPM.add(createReassociatePass()); // Reassociate expressions > + addExtensionsToPM(EP_LoopOptimizerStart, MPM); > MPM.add(createLoopRotatePass()); // Rotate Loop As this is in the middle of other LNO passes, can you please rename s/EP_LoopOptimizerStart/EP_Polly_LNO/ or
2016 Oct 13
2
Loop Unrolling Fail in Simple Vectorized loop
Thanks for the explanation. But I am a little confused with the following fact. Can't LLVM keep vectorizable_elements as a symbolic value and convert the loop to say; for(unsigned i = 0; i < vectorizable_elements ; i += 2){ //main loop } for(unsigned i=0 ; i < vectorizable_elements % 2; i++){ //fix up } Why does it have to reason about the range of vectorizable_elements? Even
2016 Oct 13
2
Loop Unrolling Fail in Simple Vectorized loop
If count > MAX_UINT-4 your loop loops indefinitely with an increment of 4, I think. On Thu, Oct 13, 2016 at 4:42 PM, Charith Mendis via llvm-dev < llvm-dev at lists.llvm.org> wrote: > So, I tried unrolling the following simple loop. > > int unroll(unsigned * a, unsigned * b, unsigned *c, unsigned count){ > > for(unsigned i=0; i<count; i++){ > > a[i] =
2013 Apr 17
0
[LLVMdev] [polly] pass ordering
On 04/17/2013 09:04 PM, Sebastian Pop wrote: > Tobias Grosser wrote: >> As said before, we could probably add it in between those two passes: >> >> MPM.add(createReassociatePass()); // Reassociate expressions >> + addExtensionsToPM(EP_LoopOptimizerStart, MPM); >> MPM.add(createLoopRotatePass()); // Rotate Loop > > As this is in the middle of other
2013 Apr 17
0
[LLVMdev] [polly] pass ordering
On 04/17/2013 08:37 PM, Sebastian Pop wrote: > Tobias Grosser wrote: >> On 04/17/2013 05:53 PM, Sebastian Pop wrote: >>> Hi, >>> >>> polly is run very early and schedules the following passes before it runs: >>> >>> /// @brief Schedule a set of canonicalization passes to prepare for Polly >>> /// >>> /// The set of
2013 Apr 17
2
[LLVMdev] [polly] pass ordering
Tobias Grosser wrote: > On 04/17/2013 05:53 PM, Sebastian Pop wrote: > >Hi, > > > >polly is run very early and schedules the following passes before it runs: > > > >/// @brief Schedule a set of canonicalization passes to prepare for Polly > >/// > >/// The set of optimization passes was partially taken/copied from the > >/// set of default
2013 Jan 03
8
How to Install Ruby and Rails
I want to install Ruby 1.8.7 and Rails 2.8.3,i am using ubuntu 11. Thank you -- Posted via http://www.ruby-forum.com/. -- You received this message because you are subscribed to the Google Groups "Ruby on Rails: Talk" group. To post to this group, send email to rubyonrails-talk-/JYPxA39Uh5TLH3MbocFF+G/Ez6ZCGd0@public.gmane.org To unsubscribe from this group, send email to
2016 Aug 30
2
Tablegen pattern matching question
Hi all, I want to match addition with 16bit integers. So I define a pattern fragment as follows: def simm16 : PatLeaf<(imm), [{ return isInt<16>(N->getSExtValue()); }]>; Now I am confused between (add R32:$dst, simm16:$im) and (add R32:$dst, (i32 simm16:$im)). Do both of them match the same pattern? Are they equivalent? If not what is the difference? I am also confused as to how
2017 Dec 26
3
Why is remalloc not marked as noalias?
Hello, According to my understanding, it seems that the result of realloc will not technically alias the original pointer. When the realloc is done in-place the reference <http://en.cppreference.com/w/c/memory/realloc> says: "The original pointer ptr is invalidated and any access to it is undefined behavior (even if reallocation was in-place)." Additionally from the C11 standard
2018 Feb 06
3
What does a dead register mean?
Hi, My understanding of a "dead" register is a def that is never used. However, when I dump the MI after reg alloc on a simple program I see the following sequence: ADJCALLSTACKDOWN64 0, 0, 0, *implicit-def dead %rsp*, implicit-def dead %eflags, implicit-def dead %ssp, implicit %rsp, implicit %ssp CALL64pcrel32 @foo, <regmask %bh %bl %bp %bpl %bx %ebp %ebx %rbp %rbx %r12 %r13 %r14
2014 Dec 07
2
[LLVMdev] Interest in LLVM
Hello everyone, My name is Pratik Bhatu, I am a bachelor student currently studying at IIT Hyderabad, India.  I just finished my Compilers course have been exploring LLVM since the past month (kaleidoscope, writing LLVM passes) and am interested in the llvm-polly project. I am also a potential GSoC applicant and wanted to start working on the project from now. Is there a way I can
2018 Feb 06
0
What does a dead register mean?
You are right about your interpretation of "dead". The case here is that RSP is a reserved register and so its liveness isn't really tracked. The "implicit-def dead" is an idiom used to mean that the register (reserved or not) is clobbered. The other implicit uses/defs can come from instruction definitions to indicate that this instruction uses and/or modifies a given
2015 Mar 10
3
[LLVMdev] [GSoc] Liveness Based Flow Sensitive Pointer Analysis for GSoc 2015
Hi all, I'm a 3rd year CSE B.Tech student and have been studying LLVM since the past year. I have written a pass for doing register allocation as part of my course project and have also been studying LLVM code sections related to SSA construction, dominance frontiers,etc. I also made some contributions to the Polly project. Currently I am interested in improving the existing alias analysis
2008 May 07
4
[LLVMdev] Missing passes
Hi, I was evaluating all transformation passes and noticed a few things. In particular, I found three passes in the documentation that I can't seem to find any code for. Where these removed? Lower GC intrinsics, for GCless code generators (-lowergc) Correlated Expression Elimination (-cee) Lower select instructions to branches (-lowerselect) Additionally, I found the following passes for