similar to: llvm pass is very slow

Displaying 20 results from an estimated 800 matches similar to: "llvm pass is very slow"

2018 Sep 06
2
Serializing LLVM IR in custom fashion
Hello. I need to write a pass that converts a whole LLVM module into a bytecode for some other VM. VM's instructions resemble LLVM ones pretty much, so it is almost 1-to-1 translation. Basically, I need to do what BitWriterPass does, but using different format for the resulting bytecode. The obvious solution is just to iterate over all Instructions and serialize them using giant
2011 Jul 31
3
[LLVMdev] SwitchInst::addCase with BlockAddress
I'm trying to figure out how to feed a blockaddress to a switch condition AND destination (basically emulating an indirectbr via a switch; I know it's not a good approach, I'm just experimenting). Suppose I have the following: SwitchInst *s = SwitchInst::Create(...); BasicBlock *bb = ...; PtrToIntInst k = new PtrToIntInst(BlockAddress::get(bb), <TYPE>, "", s);
2011 Aug 01
0
[LLVMdev] SwitchInst::addCase with BlockAddress
On Sun, Jul 31, 2011 at 7:36 AM, Carlo Alberto Ferraris <cafxx at strayorange.com> wrote: > I'm trying to figure out how to feed a blockaddress to a switch condition > AND destination (basically emulating an indirectbr via a switch; I know it's > not a good approach, I'm just experimenting). > Suppose I have the following: > > SwitchInst *s =
2018 Sep 03
4
Basic Coverage
Hi My goal is that given a binary and the corresponding input. I want to know what IR level basic blocks are covered. I need the detail information, which is the set of all the covered BBs rather than just a number. I want to know whether there are some tools that can support this requirements. If not, I think maybe instrumentation can helps. However, I do not know too much about this. Any
2018 Jun 26
2
Instruction boundaries
There should be a line-table entry for the end of the function, which appears to be missing from the dump you provided. llvm-dwarfdump should report this address with 'end_sequence' in the Flags. Are you using a different dumper? I am not sure but my guess would be that inline data is not represented in the line table. The line table's primary purpose is to inform the debugger
2018 Jun 26
2
Instruction boundaries
Hi paulr Thanks for your reply. Though DWARF info give me the code address ranges, there might be inline data. If so, how to handle this case? As for the dwarf line table. Sometimes, the source line might be zero. Do you know why? If all instructions should be describe in the line table, I think analyzing Dwarf line table is enough to get all the instructions addresses. Do you agree? I would
2018 Jun 26
2
Instruction boundaries
I'm not familiar with the target instruction set, but if "MOV PC, R0" is not a return instruction, I'm guessing that the sequence starting at A39C is a dispatch through a jump table. The jump table would be considered part of the instruction stream and included in the scope of the line table. This is not a case where you would see end_sequence; my mistake. The line table does
2018 Jun 12
4
IR to binary address mapping
Hi I know that LLVM provide some debug API for us to know the source code information. For example, every IR instruction's source line number and column number. However, are there any method to get a mapping from IR instruction to binary address directly. I don't want to use dwarf line mapping table as a bridge. I think the binary is generated by clang and llvm. I think there definitely
2015 Jul 24
2
[LLVMdev] Transforming SwitchInst to BranchInst
Hi, Are there some built-in LLVM transformation pass, or written library code that transforms LLVM::SwitchInst into if-condition statements (LLVM:: BranchInst)? The purpose of the transformation is that we have a legacy program analyzer that includes an LLVM pass manipulating if-condition statements. Statements of LLVM::SwithchInst should have been handled in the same manner but was not done.
2018 Jun 13
2
IR to binary address mapping
Hi Paul Thanks for your comments. Suppose I can generate the control flow graph via LLVM Pass or the default option like '-dot-cfg' with opt. However, the control flow graph is based on llvm IR level. I would like to have a control flow graph based on binary level. Thus, I want to map the IR to binary address. As far as I know, we used to use the debug information to map the IR to source
2018 Jun 13
2
IR to binary address mapping
Hi However, frontend may also do various operations on the source code and one line number and column number could map to more than one binary address. Why LLVM IR cannot? Regrads Muhui 2018-06-12 23:18 GMT+08:00 mayuyu.io <admin at mayuyu.io>: > In theory that’s not exactly possible/accurate. Due to various operations > in the Backend like Instruction Legalization, one IR
2012 Nov 29
2
[LLVMdev] [cfe-dev] UB in TypeLoc casting
Moving to LLVM dev to discuss the possibility of extending the cast infrastructure to handle this. On Tue, Nov 20, 2012 at 5:51 PM, John McCall <rjmccall at apple.com> wrote: > On Nov 18, 2012, at 5:05 PM, David Blaikie <dblaikie at gmail.com> wrote: >> TypeLoc casting looks bogus. >> >> TypeLoc derived types return true from classof when the dynamic type >>
2009 Apr 14
3
[LLVMdev] InstVisitor Example
On Apr 14, 2009, at 1:49 PM, Luke Dalessandro wrote: > > On Apr 14, 2009, at 12:48 PM, Brice Lin wrote: > >> I just read the LLVM Programmer's Manual, which mentions (but >> specifically does not include any details of) the InstVisitor >> template. Could someone please provide an example of how to use this >> template to find (as an example) all CallSites for
2018 Nov 08
2
Compile with both arm and thumb mode
Hi I would like to use clang to cross compile the ARM binary. I hope the target binary contains both arm and thumb instruction sets. I use the flag -mhwdiv=arm,thumb. I compiled several binaries. However, I found that the thumb mode instructions are few. Even for very big program like gcc. The number of thumb mode instruction is less than 100. I get the ground truth from the mapping table.
2009 Apr 14
2
[LLVMdev] InstVisitor Example
I just read the LLVM Programmer's Manual, which mentions (but specifically does not include any details of) the InstVisitor template. Could someone please provide an example of how to use this template to find (as an example) all CallSites for the function strcpy? Thanks, Brice Lin
2018 Jun 28
2
Distinguish between ARM and Thumb
Hi Nowadays I am using LLVM to do ARM binary analysis. I was wondering is llvm available to provide some debugging information on the mode of ARM. For example, llvm-dwarfdump could dump some instructions information for debugging. Is it able to know the mode for each instruction? Or we may write some llvm pass to help us to know the instruction mode? Any suggestions are welcomed. Many Thanks
2018 Jun 03
2
Function start address
Hi Muhui, I tried to grep the "DW_TAG_subprogram" from the debug_info . However, I noticed that the number I found is still less than the whole functions I found with LLVM IR. Do you have any experiences? Many Thanks The only explanation that comes to mind, is that the functions are not in the final binary object file. However, previously you said you believed they were present. If
2018 Sep 05
2
AddressSanitizer on SPECCPU2006
Hi Alex Thanks for your email. But it seems not work. I removed the -fsanitize=address flag. The global buffer overflow message doesn't show. However, no *.sancov file is created after I run perlbench. Thus, I could not get the BB coverage. Do you have any ideas? Many Thanks Regards Muhui Alexander Potapenko <glider at google.com> 于2018年9月5日周三 下午7:14写道: > Hi Muhui, > > If
2014 Jul 07
4
[LLVMdev] Splitting basic block results in unknown instruction type assertion
Hello, I would like to see if this issue is a result of a misunderstanding on my part before I file a bug. I am using LLVM 3.4, built from the source tarballs. My system's uname is "Darwin tyler-air 12.5.0 Darwin Kernel Version 12.5.0: Sun Sep 29 13:33:47 PDT 2013; root:xnu-2050.48.12~1/RELEASE_X86_64 x86_64". All I'm trying to do is add a runtime check after all call
2018 Jun 01
3
Function start address
Hi I am using LLVM Pass combined with dwarf debug information to get all the function's start address. My steps are below: First, I write the function pass to get the start line of each function, which is finished. Then, based on the start line of every single function, I try to query the specific line from the dwarf's line binary table, which is generated with llvm-dwarfdump