similar to: Enforcing in post-RA scheduling to keep (two) MachineInstrs together

Hello. I generated in the back end by hand (in C++ code, not with TableGen) some fancy assembly code using Inline ASM expressions and if I use 2 functions in my source code (but NOT just 1 function; I will not present the functions, but each requires me to generate an Inline ASM expression) I get this error at compilation (at scheduling): BB#0: derived from LLVM BB %entry

Hi, Matthias. >From the class hierarchy, ScheduleDAGMILive is also a ScheduleDAGMI. I am wondering if there will be any problem if we use subclass of ScheduleDAGMILive as post-RA scheduler? The best case is ScheduleDAGMILive just waste time on book-keeping register pressure, but I am not sure if we can still do those book-keeping after RA. Talk about post-RA scheduler, I see there is another

Hi All, The description of ScheduleDAGMILive [1] says: ScheduleDAGMILive is an implementation of ScheduleDAGInstrs that schedules machine instructions while updating LiveIntervals and tracking regpressure. Does the live interval and register pressure part of ScheduleDAGMILive mean the subclass of ScheduleDAGMILive is a pre-RA scheduler? I assume the post-RA scheduler no need to take

I probably misunderstood the question. You probably want to do this in SelectionDAG. On Fri, Oct 21, 2016 at 10:29 AM, Ehsan Amiri <ehsanamiri at gmail.com> wrote: > You can do this by changing instruction scheduling heuristics. I think the > more important question is if this correct always for all platforms. > > I don't know which scheduler you use. We use

Also you might need to check use PostRASchedulerList or PostMachineScheduler, PostRASchedulerList is considered deprecated as mentioned in [1]. [1] http://lists.llvm.org/pipermail/llvm-dev/2017-April/112348.html HTH, chenwj 2017-06-10 4:03 GMT+08:00 陳韋任 <chenwj.cs97g at g2.nctu.edu.tw>: > Not saying I am totally understand how thing works, but I think you're > misleading >

Hi All, While reading SchedulePostRATDList::ListScheduleTopDown() [1], I find SchedulingPriorityQueue::dump has an empty implementation. Therefore, the following debug dump basically outputs nothing. DEBUG(dbgs() << "\n*** Examining Available\n"; AvailableQueue.dump(this)); Not sure why we want this. Is it intended? [1]

Hi, I recently switched to LLVM-GCC 4.2 on OS X, to go around a bug caused by gcc with optimized code. Unfortunately, I ran into another weird problem on LLVM-GCC. In my code, there's a file with a bunch of inline assembly blocks, that worked fine with GCC 4.2. Now, when compiling with LLVM-GCC 4.2, weird things happen. Here's an example: (the blocks are larger than that, but a single

You may find it helpful to reference http://www.ibiblio.org/gferg/ldp/GCC-Inline-Assembly-HOWTO.html. In particular, the information regarding clobbers and constraints. Generally speaking, it's best not to use inline assembly at all. What are you trying to do that you find it necessary? On Mar 16, 2010, at 12:30 AM, Fred / Kettch wrote: > Hi, > > I recently switched to LLVM-GCC

Hi, I' am trying to insert an InlineAsm Instruction in my pass, which FunctionType do I need for Inlineasm? If I understand it right, I need a call instruction to insert the new produced InlineAsm? Thanks for help, Michael for (BasicBlock::iterator bi = i->begin(), be = i->end(); bi != be; ++bi){ std::vector<const Type*> asm_arguments;

I would like to make the following member of AsmPrinter be protected void EmitInlineAsm(StringRef Str, const MDNode *LocMDNode = 0, InlineAsm::AsmDialect AsmDialect = InlineAsm::AD_ATT) const; I have some stubs that I want to emit in MipsAsmParser . Are there any objections to doing this? Reed

Hi all, I'm trying to figure out which parameters of a given InlineAsm instruction are its inputs, and which are the outputs (rationale: make sure MSan doesn't check the output parameters of an asm() statement). As far as I understand, this information is only available through the ConstraintInfoVector for the InlineAsm. However there's no exact match between the constraints and the

On Jul 31, 2009, at 10:24 AM, Michael Graumann wrote: > Hi, > I’ am trying to insert an InlineAsm Instruction in my pass, which > FunctionType do I need for Inlineasm? > If I understand it right, I need a call instruction to insert the > new produced InlineAsm? > > Thanks for help Inline asm works like a "callee". So for: call void asm sideeffect

Hello Mentors, I am currently finding bug in Local Function related optimization due to which runtime failures are observed in some test cases, as those test cases are containing very large function with recursion and object oriented code so I am not able to find a pattern which is causing failure. So I tried following simple case to understand expected behavior from this optimization. Consider

Hi, I am seeing a case, in a private port, of an inline asm with indirect memory references being allocated invalid registers (i.e. registers that cannot be used on loads). For example, the inline asm constraint is correct: call void asm sideeffect "MOV $$r0, $0\0AMOV $$r0, $1\0A", "*m,*m,~{r0}"(i16* @a, i16* %b) #1, !srcloc !1 but then $0 and $1 are allocated to registers

Hi, While attempting to build the LLVM code from CVS today using gcc 4.1, I encountered the following error. Any idea how to proceed with the build? llvm[2]: Linking Debug executable llvm-as /home/ll/programs/source/scm/cvs/llvm/Debug/lib/libLLVMAsmParser.a(llvmAsmParser.o): In function `__static_initialization_and_destruction_0':

Could you provide an example where MSan checks an output parameter? On Fri, Mar 16, 2018 at 9:53 AM, Alexander Potapenko via llvm-dev <llvm-dev at lists.llvm.org> wrote: > Hi all, > > I'm trying to figure out which parameters of a given InlineAsm instruction > are its inputs, and which are the outputs (rationale: make sure MSan > doesn't check the output parameters of

Hi everyone, I am doing some work with LLVM IR, I need to use LLVM IR to do operation on C variables. Code emission is done by LLVM JIT. That variable is C thread local , for example __thread int* gvar; I think some methods to convert that variable to LLVM IR, (1) use external function I know LLVM IR is able to call an external function, so I can write codes that look like: int* load()

Hi I am trying to modify the llc in that way: subf 3, 5, 3 subf 3, 5, 3 stw 3, 44(1) stw 3, 44(1) # InlineAsm Start --> isync

Hi, both versions are working: FunctionType *asm_Ftype = FunctionType::get(Type::VoidTy, std::vector<const Type*>(), false); InlineAsm* Iasm = InlineAsm::get(asm_Ftype,"isync","~{dirflag},~{fpsr},~{flags}",true); How can I insert this InlineAsm, because it is no instruction and this way it will not work: Instruction *pi = bi;

Thank you Chris, for your hint, but I am still too stupid. I tried two versions asm_arguments.push_back(Type::VoidTy); FunctionType *asm_type = FunctionType::get(Type::VoidTy, asm_arguments, false); Alternatively FunctionType *asm_type = FunctionType::get(Type::VoidTy, std::vector<const Type*>(), false); . Can you give me a snippet of example code, or somebody else?