similar to: Got stuck with PC-rel branching

Hi, For the function call - yes, probably. But what about branching inside one function (standard if-then for example)? For example: echo "int g() { int a = 1; if (a > 3) return 1; return 0; }" | clang -x c - -o /tmp/a.o -c && objdump -d /tmp/a.o Thanks, Petr On Thu, Jan 19, 2017 at 8:06 PM, Friedman, Eli <efriedma at codeaurora.org> wrote: > On 1/19/2017 9:11

Hi Eli, Thanks again for your reply. I am unsure about implementing the getCrossCopyRegClass for my target. My target does not support or allow moves to and from the SR. The SR exists because it has implicit involvement in some instructions, but it is opaque to the assembler and to the user as a register. I mean, there are no instructions to directly move or read it, or even access it directly.

Hi, I've been experimenting with writing a backend for LLVM (3.2) (having already written a frontend http://savourysnax.github.com/EDL), everything was going reasonably ok ( calls/returns, epilogue, prologue, etc are all working), up until I tried to place support for conditional branches. Given this simple program : int test(int c,int d) { if (c) { return

Hi Eli, Thank you very much for your response. In fact, I had already tried the X86 approach before, i.e explicitly using the status register. This is the approach that appeals more to me. I left it parked because it also produced some problems (but I left it commented out). So I have now re-lived the code, and it works fine in most cases, but there’s a particular case that causes LLVM to stop

Big thanks, i've managed to find what's going on. The thing that dumbfolded me a couple of times was that the error was thrown in one of the MCAssembler methods, but never in applyFixup() itself. On Thu, Jan 19, 2017 at 8:46 PM, Friedman, Eli <efriedma at codeaurora.org> wrote: > On 1/19/2017 10:21 AM, Peter Bel wrote: > >> Hi, >> >> For the function call -

Hi, I have added Branch condition BGEID like below… *def : Pat<(brcond (setcc (i32 GR32:$L), (i32 GR32:$R), SETGE), bb:$T),* * (BGEID (CMP GR32:$L, GR32:$R), bb:$T)>;* *def BGEID : TBT<0b101110, (outs), (ins GR32:$ra, brtarget:$offset), "bgeid\t$ra,$offset", [], IIC_BRc> {* * let rd = 0b10101;* *}* *def brtarget : Operand<OtherVT>* *{*

Hi Lee, > let isReturn = 1, isTerminator = 1, isBarrier = 1 in > { > def RET : BitscuitInst<(outs),(ins),"JMP\tR6",[(Bitscuit_return)]>; > > def JMP : BitscuitInst<(outs), (ins jmptarget:$dst),"JMP\t$dst",[(br > bb:$dst)]>; > } Ah! It looks like the isReturn is to blame then. LLVM is presumably going through adding an implicit use of any