Displaying 20 results from an estimated 12000 matches similar to: "RFC: LLD range extension thunks"
2017 Jan 05
2
RFC: LLD range extension thunks
Hello Rui,
Thanks for the comments
- Synthetic sections and rewriting relocations
I think that this would definitely be worth trying. It should remove
the need for thunks to be represented in the core data structures, and
would allow .
It would also mean that we wouldn't have to associate symbols with
thunks as the relocations would directly target the thunks. ARM
interworking makes reusing
2016 Jun 21
2
[LLD] thunk implementation correctness depends on order of input section.
I've been working on supporting ARM/Thumb interworking thunks in LLD
and have encountered a limitation that I think it is worth bringing up
in a wider context. This is all LLD specific, apologies if I've abused
llvm-dev here.
TL;DR summary:
- Thunks in lld may not work if they are added to InputSections that
have already been scanned.
- There is a short term fix, but in the longer term I
2017 Jan 06
3
RFC: LLD range extension thunks
On Fri, Jan 6, 2017 at 6:21 AM, Rui Ueyama via llvm-dev <
llvm-dev at lists.llvm.org> wrote:
> On Thu, Jan 5, 2017 at 8:15 PM, Peter Smith <peter.smith at linaro.org>
> wrote:
>
>> Hello Rui,
>>
>> Thanks for the comments
>>
>> - Synthetic sections and rewriting relocations
>> I think that this would definitely be worth trying. It should
2016 Sep 07
5
[LLD] Writing thunks before the corresponding section
Hi,
MIPS LA25 thunk is used to call PIC function from non-PIC code.
Usually it contains three instructions:
lui $25, %hi(func)
addiu $25, $25, %lo(func)
j func
We can write such thunk in an arbitrary place of the generated file.
But if a PIC function requires the thunk is the first routine in a
section, we can optimize the code and escape jump instruction. To do
so we just write the
2017 Jan 06
2
RFC: LLD range extension thunks
After looking at this for a while, I do not think that this problem is
NP-hard. With a finite "short branch" displacement k, I was not able to
come up with a gadget that could create global constraints as would be
needed to e.g. model an instance of 3SAT or vertex cover in terms of this
problem.
The problem is hard though. I believe that it is likely to be exponential
in the "short
2016 Jun 22
2
[LLD] thunk implementation correctness depends on order of input section.
First of all thanks for finding the bug.
I agree with Rui that right now we can manage without general thunk
infrastructure. Let's provide at least a few "thunk" implementation
and after that reconsider necessity of common thunk framework. As to
MIPS there is one more type of thunk (keyword is .MIPS.stubs) and one
more optimization of current thunk (putting a thunk in the beginning
2017 Apr 04
2
[LLD] RFC Range Thunks Implementation review for ARM and Mips
This RFC is primarily to support the review of the range extension
thunks implementation of lld. This concerns ARM and Mips as all of the
thunk creation step is skipped over if the target doesn't need thunks.
Mips LA25 Thunks are not range extension Thunks but these are
generated using the same code, I've kept the behaviour the same as it
is now, although the implementation is obviously
2017 Jul 11
8
[LLD] Linker Relaxation
Here's an example using the gcc toolchain for embedded 32 bit RISC-V (my
HiFive1 board):
#include <stdio.h>
int foo(int i){
if (i < 100){
printf("%d\n", i);
}
return i;
}
int main(){
foo(10);
return 0;
}
After compiling to a .o with -O2 -march=RV32IC we get (just looking at foo)
00000000 <foo>:
0: 1141 addi sp,sp,-16
2016 Oct 19
3
LLD: creating linker-generated sections as input sections instead of output sections
On Wed, Oct 19, 2016 at 3:34 AM, Peter Smith via llvm-dev <
llvm-dev at lists.llvm.org> wrote:
> Thanks for the RFC.
>
> I'm in favour of the option of creating InputSections for some linker
> generated content. I think it would add extra flexibility to the
> linker. ARM's proprietary linker uses the equivalent of InputSections
> with a pseudo linker defined
2018 Jan 25
0
Adding a new target to 'llvm-lld'
I'm not aware of a written guide either. In 2016 I did a talk on that
subject at the LLVM Cauldron
(http://llvm.org/devmtg/2016-09/#schedule) although quite a bit has
changed since then so I'm hesitant to recommend it apart from general
principles.
I can't speak for the COFF side as I've only worked on the ELF side of
LLD; my suggestions on where to start:
- Properties of the
2016 Nov 29
2
[LLD] Writing thunks before the corresponding section
Hi,
Sorry for delay with reply.
It looks like now thunks can be implemented as a synthetic sections.
In that case we give flexible solution and will be able to put thunks
before/after related sections, using different alignment etc. As far
as I know BFD linker uses the same approach at least for MIPS thunks.
I will try to implement this idea.
On Thu, Sep 8, 2016 at 1:44 AM, Rui Ueyama <ruiu
2016 Nov 30
0
[LLD] Writing thunks before the corresponding section
Sure. One thing I want to remind you is that there is a place in Writer.cpp
where we assume all synthetic sections were appended to end of Sections
list. Look for `llvm::reverse`. If you add synthetic section thunks right
before/after non-synthetic sections, you also want to change that.
On Tue, Nov 29, 2016 at 1:18 PM, Simon Atanasyan <simon at atanasyan.com>
wrote:
> Hi,
>
>
2016 Jun 03
2
[RFC][LLD][ARM] Initial ARM port for LLD
Hello everyone,
The review http://reviews.llvm.org/D20951 implements initial support
for the ARM architecture in LLD. To keep the patch size down, and to
avoid the complexities of interworking between ARM and Thumb, there
is just enough support for an ARM only Hello World to link and run on
ARM Linux [*].
My main aim is to get this functionality committed as the basis of an
ARM port and would
2016 Oct 19
2
LLD: creating linker-generated sections as input sections instead of output sections
I would suggest converting only part of linker generated sections to
input sections to reduce amount of code changes.
For example it's unlikely that SymbolTableSection or
StringTableSection would ever require such treatment, so why
converting them to input sections?
2016-10-19 11:03 GMT+03:00 George Rimar <grimar at accesssoftek.com>:
>>This idea popped up in the review thread
2018 Jan 25
4
Adding a new target to 'llvm-lld'
Hi LLVM-Devs,
I am considering switching to using 'llvm-lld' instead of Gnu 'ld' in a future revision of our out-of-tree target, and I am wondering is there a getting started guide for how to go about extending 'llvm-lld' to support an additional target.
Thanks,
MartinO
--------------------------------------------------------------
Intel Research and Development
2017 Jan 18
4
RFC: LLD range extension thunks
On Jan 19, 2017 2:48 AM, "Ed Maste" <emaste at freebsd.org> wrote:
On 4 January 2017 at 13:34, Peter Smith via llvm-dev
<llvm-dev at lists.llvm.org> wrote:
> I'm about to start working on range extension thunks in lld. This is
> an attempt to summarize the approach I'd like to take and what the
> impact will be on lld outside of thunks.
Now that LLD works
2017 Apr 05
4
[LLD] RFC Range Thunks Implementation review for ARM and Mips
Are you suggesting other linker jobs such as creating _end symbols to the
linker script?
The linker script support was implemented after we wrote the current Writer
class, so it is somewhat "plugged in" to the Writer. It might not be the
best design, and not many other options have been explored. So there might
be room to improve code by moving work loads from the Writer to the
[LLVMdev] PSA: Perfectly forwarding thunks can now be expressed in LLVM IR with musttail and varargs
2014 Oct 09
2
[LLVMdev] PSA: Perfectly forwarding thunks can now be expressed in LLVM IR with musttail and varargs
On 8 Oct 2014, at 18:19, Reid Kleckner <rnk at google.com> wrote:
> The one target I know about where varargs are passed differently from normal arguments is aarch64-apple-ios/macosx. After thinking a bit more, I think this forwarding thunk representation works fine even on that target. Typically a forwarding thunk is called indirectly, or at least through a bitcast, so the LLVM IR call
2017 Jul 11
2
[LLD] Linker Relaxation
Hi,
Does lld support linker relaxation that may shrink code size? As far
as I see lld seems to assume that the content of input sections to be
fixed other than patching up relocations, but I believe some targets
may benefit the extra optimization opportunity with relaxation.
Specifically, I'm currently working on adding support for RISC-V in
lld, and RISC-V heavily relies on linker relaxation
2018 Feb 03
2
retpoline mitigation and 6.0
On Fri, Feb 2, 2018 at 4:36 PM David Woodhouse <dwmw2 at infradead.org> wrote:
> On Sat, 2018-02-03 at 00:23 +0000, Chandler Carruth wrote:
> >
> > Two aspects to this...
> >
> > One, we're somewhat reluctant to guarantee an ABI here. At least I
> > am. While we don't *expect* rampant divergence here, I don't want
> > this to become