similar to: Alive now available online

Hi Sanjay, You used Alive correctly, of course :) At this moment we cannot give you the best precondition. It’s on the todo list, but it’s not even started yet. It’s a much harder problem to solve. We do have a mode to compute the best set of nsw/nuw/exact attributes in the transformed expression, but it’s not enabled on the web interface yet (InstCombine was missing quite a few cases last

Not sure how off-topic this is, but should we consider/have we considered porting our InstCombines to Alive? The PLDI '15 paper even demos C++ extraction from Alive theorems. I think it'd be a small step from that to extracting tightly optimized VM code, not unlike what Tablegen emits. Everything would be so clean and readable and organized. And edge cases can still be handled manually,

Alive is now working again. There was a migration to a new server. Permalinks are still being copied from backup; they will work again shortly as well. (I would probably not create new ones since they may get replaced while the copy is in flux). Nuno Citando Nuno Lopes via llvm-dev <llvm-dev at lists.llvm.org>: > I'm investigating; thanks for the heads up. Sorry for the

And now rise4fun.com doesn't work at all? ~Craig On Wed, Sep 20, 2017 at 9:53 AM, Nuno Lopes <nunoplopes at sapo.pt> wrote: > Alive is now working again. There was a migration to a new server. > Permalinks are still being copied from backup; they will work again > shortly as well. (I would probably not create new ones since they may get > replaced while the copy is in

Sorry, we really screwed up the server migration. Alive is now working again and should be fixed for good :) Permalinks are still missing; we are working on recovering those. Apologies again for all the trouble. Nuno -----Original Message----- From: Sanjay Patel Sent: Monday, October 2, 2017 5:10 PM Subject: Re: [llvm-dev] Where did Alive go? I still can't use the web app - spins for

Craig I know it's a pain compared to the web interface but Alive is pretty easy to install and run from a shell. John On 9/22/17 11:41 AM, Craig Topper via llvm-dev wrote: > And now rise4fun.com <http://rise4fun.com> doesn't work at all? > > ~Craig > > On Wed, Sep 20, 2017 at 9:53 AM, Nuno Lopes <nunoplopes at sapo.pt > <mailto:nunoplopes at

This no longer works http://rise4fun.com/Alive ~Craig -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20170919/1a9c951b/attachment.html>

I'm looking at the output of memcmp() expansion (D34904), and I noticed that there are many ways to produce the common positive/zero/negative comparison result in IR. For the following 6 functionally equivalent C source functions, we produce 6 different versions of IR which leads to 6 different asm outputs for x86. Which of these should we choose as canonical IR form? 1. Two selects int

+1 to alive2.llvm.org On Thu, Jun 18, 2020 at 8:11 AM John Regehr via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > > If we can get Alive1 up there too, that would be even better. I still > > use that to try to prove things where it's not obvious how to express > > the relationships in pure LLVM IR: > > https://rise4fun.com/Alive/NDu > > I don't

No concerns from me. I use Alive2 all the time, and it would be fantastic to have it available online reliably. If we can get Alive1 up there too, that would be even better. I still use that to try to prove things where it's not obvious how to express the relationships in pure LLVM IR: https://rise4fun.com/Alive/NDu On Wed, Jun 17, 2020 at 4:05 PM Chris Lattner via llvm-dev < llvm-dev at

Confirm there is no change in IR if the hack is disabled in the sources. David wrote that these instructions are created by SCEV. Are other targets affected by the changes, e.g. X86? Kind regards, Evgeny Astigeevich Senior Compiler Engineer Compilation Tools ARM From: Sanjay Patel [mailto:spatel at rotateright.com] Sent: Sunday, January 22, 2017 10:45 PM To: Evgeny Astigeevich Cc: llvm-dev; nd

> On Jan 23, 2017, at 3:48 PM, Sanjay Patel via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > All targets are likely affected in some way by the icmp+shl fold introduced with r292492. It's a basic pattern that occurs in lots of code. Did you see any perf wins on your targets with this commit? > > Sadly, it is also likely that many (all?) targets are negatively

I'm investigating; thanks for the heads up. Sorry for the trouble. Nuno -----Original Message----- From: Craig Topper via llvm-dev Sent: Tuesday, September 19, 2017 11:52 PM Subject: [llvm-dev] Where did Alive go? This no longer works http://rise4fun.com/Alive ~Craig

> On Jan 24, 2017, at 7:18 AM, Sanjay Patel <spatel at rotateright.com> wrote: > > > > On Mon, Jan 23, 2017 at 10:53 PM, Mehdi Amini <mehdi.amini at apple.com <mailto:mehdi.amini at apple.com>> wrote: > >> On Jan 23, 2017, at 3:48 PM, Sanjay Patel via llvm-dev <llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org>> wrote: >>

Hi folks, I've been running a Compiler Explorer instance with Alive2 on a machine in my office, but availability has been poor due to random factors and of course recently it hasn't been easy or convenient to go in and fix things when the machine gets wedged. Nuno and I would like to ask the LLVM community if it's OK to point alive.llvm.org at a cloud machine that I've setup

In the situation where a partial word is tested, lets say >0, by shifting left to get the sign bit into the msb and testing llvm is inserting a spurious right shift instruction. For example this IR: ... %0 = load i64* %a.addr, align 8 %shl = shl i64 %0, 28 %cmp = icmp sgt i64 %shl, 0 ... results in ... shlq $28, %rdi sarq $28, %rdi ; <<< spurious shift

Some InstCombine transforms for select-of-select were added here: https://reviews.llvm.org/rL228409 But Alive says this is more poisonous: Name: selsel %s1 = select i1 %cond1, i8 C1, i8 C2 %s2 = select i1 %cond2, i8 %s1, i8 C2 => %andcond = and i1 %cond1, %cond2 %s2 = select i1 %andcond, i8 C1, i8 C2 http://rise4fun.com/Alive/JT6 Are those transforms legal? -------------- next part

Hi Sanjay, Thank you for your analysis. It’s interesting why the x86 machine is not affected. Maybe the x86 backend is smarter than the AArch64 backend, or it might be micro-architectural differences. I don’t mind to keep the changes on trunk. What I’d like to see is who will/should be involved in solving the issue. What kind of help/support is needed? Should we (ARM Compilation Tools) start

Hi Nuno, Chandler, Nuno Lopes via llvm-dev wrote: > This program stores 8 bits, and leaves the remaining 24 bits > uninitialized. It then loads 16 bits, half initialized to %v, half > uninitialized. SROA transforms the above function to: > > define i16 @g(i8 %in) { > %v = add nsw i8 127, %in > %1 = zext i8 %v to i16 > %2 = shl i16 %1, 8 > %3 = and

> On 11/8/2016 3:32 PM, Sanjoy Das wrote: >> Hi Nuno, Chandler, >> >> Nuno Lopes via llvm-dev wrote: >> > This program stores 8 bits, and leaves the remaining 24 bits >> > uninitialized. It then loads 16 bits, half initialized to %v, half >> > uninitialized. SROA transforms the above function to: >> > >> > define i16 @g(i8 %in) {