similar to: [arm, aarch64] Alignment checking in interleaved access pass

Hi Renato, Thank you for the answers! First, let me clarify a couple of things and give some context. The patch it looking at VSTn, rather than VLDn (stores seem to be somewhat harder to get the "right" patterns, the pass is doing a good job for loads already) The examples you gave come mostly from loop vectorization, which, as I understand it, was the reason for adding the

On Mon, Oct 10, 2016 at 1:14 PM, Renato Golin <renato.golin at linaro.org> wrote: > On 10 October 2016 at 19:39, Alina Sbirlea <alina.sbirlea at gmail.com> > wrote: > > Now, for ARM archs Halide is currently generating explicit VSTn > intrinsics, > > with some of the patterns I described, and I found no reason why Halide > > shouldn't generate a single

I"m getting build errors I think from one of your patches O tjoml. You need to have a build area that builds with clang and does warnings as errors to avoid these issues on putback. here is my configure step for example: /home/rkotler/llvm_trunk/configure --enable-werror --prefix=/home/rkotler/ll vm/install CC=/home/rkotler/llvm_3_2/install/bin/clang CXX=/home/rkotler/llvm_3_

It is r195843 and fixed in r195905, FYI. 2013/11/29 Reed Kotler <rkotler at mips.com>: > I"m getting build errors I think from one of your patches O tjoml. > > You need to have a build area that builds with clang and does warnings as > errors to avoid these issues on putback. > > here is my configure step for example: > /home/rkotler/llvm_trunk/configure

I'm still seeing this problem. On 11/28/2013 09:37 AM, NAKAMURA Takumi wrote: > It is r195843 and fixed in r195905, FYI. > > 2013/11/29 Reed Kotler <rkotler at mips.com>: >> I"m getting build errors I think from one of your patches O tjoml. >> >> You need to have a build area that builds with clang and does warnings as >> errors to avoid these

Is there a compile-time and/or potential runtime cost that makes enableInterleavedAccessVectorization() default to 'false'? I notice that this is set to true for ARM, AArch64, and PPC. In particular, I'm wondering if there's a reason it's not enabled for x86 in relation to PR27881: https://llvm.org/bugs/show_bug.cgi?id=27881 -------------- next part -------------- An HTML

On 26 May 2016 at 19:12, Sanjay Patel via llvm-dev <llvm-dev at lists.llvm.org> wrote: > Is there a compile-time and/or potential runtime cost that makes > enableInterleavedAccessVectorization() default to 'false'? > > I notice that this is set to true for ARM, AArch64, and PPC. > > In particular, I'm wondering if there's a reason it's not enabled for

I'm getting this error in my mips16 port. I think that PHI replacement is done in some target independent phase. In the process of debugging this. Maybe to someone else it's obvious how this can happen . tia, Reed *** Bad machine code: MBB exits via unconditional fall-through but its successor differs from its CFG successor! *** - function: main - basic block: BB#0 entry

LLVM Command Line Library I'm proposing a heavy weight command line parsing and generating library for LLVM to replace Clang's parser and provide one for lld and any future tools that may need it. The scope of this library is slightly larger than what Clang has now, but not much. It is centered around the concept of a Tool. A Tool has a set of Options which can be parsed to Arguments or

I wonder if someone could explain the behavior of the anova() and lm() functions in the following situation: I have a standard 3x2 factorial design, factorA has 3 levels, factorB has 2 levels, they are fully crossed. I have a dependent variable DV. Of course I can do the following to get the usual anova table: > anova(lm(DV~factorA+factorB+factorA:factorB)) Analysis of Variance Table

Dear all, When I try to return some vectors from some functions within a function, it indicate an error," Error in rbind(ck1, ck2, ck3) : object 'ck1' not found", in one of the iterations and stop.  Since I am not experienced in programming, can anyone give me a suggestion to inspect this error? The followings are the functions I created : ################### # functions in the

Hi, Your problem is that the function arguments, which are makes as noalias, are not being directly used as the base objects of the array accesses: > %v0.addr = alloca float*, align 8 > %v1.addr = alloca float*, align 8 > %v2.addr = alloca float*, align 8 > %t.addr = alloca float*, align 8 ... > store float* %v0, float** %v0.addr, align 8 > store float* %v1, float** %v1.addr,

Dear R-users I need to calibrate kappa, rho, eta, theta, v0 in the following code, see below. However when I run it, I get: y <- function(kappahat, rhohat, etahat, thetahat, v0hat) {sum(difference(k, t, S0, X, r, implvol, q, kappahat, rhohat, etahat, thetahat, v0hat)^2)} > nlminb(start=list(kappa, rho, eta, theta, v0), objective = y, lower =lb, > upper =ub) Error in dots[[1L]][[1L]] :

This is a proposal to add strong GC reference types to LLVM. We have some local (downstream) patches that are needed to prevent LLVM's optimizer from making transforms that are problematic in the presence of a precise relocating GC. Adding a notion of a strong GC reference to LLVM will let us upstream these patches in a principled manner, and will act as a measure to avoid new problematic

Hi, LLVM community: I found basicaa seems not to tell must-not-alias for __restrict__ arguments in c/c++. It only compares two pointers and the underlying objects they point to. I wonder how clang does alias analysis for c/c++ keyword restrict. let assume we compile the following code: $cat myalias.cc float foo(float * __restrict__ v0, float * __restrict__ v1, float * __restrict__ v2, float *

Hi there, I wonder if anyone can help me. I'm trying to use bargraph.CI in the Sciplot package when there is a missing combination of the factor levels. Unfortunately the standard errors on the plot do not appear to be correct. Consider an analysis consisting of two factors A and B. When all factor level combinations are present all appears fine: library(sciplot) #all data

On 18/04/16 22:14, Karol Herbst wrote: > we will access the current set cstate at least every second and this safes us saves > some CPU cycles looking them up every second. > > Signed-off-by: Karol Herbst <nouveau at karolherbst.de> > --- > drm/nouveau/include/nvkm/subdev/clk.h | 2 +- > drm/nouveau/nvkm/engine/device/ctrl.c | 5 ++++- >

Hi, I've found a test case where SelectionDAG is doing an undefined behavior optimization, and I need help determining whether or not this is legal. Here is the example IR: define void @test(<4 x i8> addrspace(1)* %out, float %a) { %uint8 = fptoui float %a to i8 %vec = insertelement <4 x i8> <i8 0, i8 0, i8 0, i8 0>, i8 %uint8, i32 0 store <4 x i8> %vec, <4

The patch seems fine but I found it super confusing that sometimes `pstate` is a pointer (for example `clk->pstate`), sometimes it is an int (for example `args->v0.pstate`). On 2017-09-15 — 17:11, Karol Herbst wrote: > We will access the current cstate at least every second and this saves us > some CPU cycles looking them up every second. > > v2: Rewording commit message. >

Dear Rich, It depends how the data is generated. Although I am not an expert in ecology, I can explain it based on a biomedical example. Certain variables are generated geometrically (exponentially), e.g. MIC or Titer. MIC = Minimum Inhibitory Concentration for bacterial resistance Titer = dilution which still has an effect, e.g. serially diluting blood samples; Obviously, diluting the