similar to: Problem with Aarch64 ?

Displaying 20 results from an estimated 1300 matches similar to: "Problem with Aarch64 ?"

2013 Jan 05
1
[LLVMdev] Compiler opt is turned off ?
I completely agree with you. The source code I wrote here has the main function and is a complete code. That's why I was expecting load/store analysis could have been incorporated across the module. Thanks. On Fri, Jan 4, 2013 at 10:43 PM, Daniel Berlin <dberlin at dberlin.org> wrote: > I'm not sure what you mean by "use" check. > If you compile this with LTO and
2013 Jan 01
2
[LLVMdev] clang with -emit-llvm
Hello, I have just started using llvm. I was trying to debug how *clang* generates IR for very simple C testcases (few assignments and if-condsitions). To get a hold on the basic functions, I put some break points on following functions but debugger *didn't stop*: llvm::BasicBlock::Create llvm::BinaryOperator::CreateAdd (design has binary op) llvm::Value::Value llvm::BranchInst::Create
2013 Jan 04
2
[LLVMdev] Compiler opt is turned off ?
Thanks for your reply. So, we don't do any "use" check (for globals variables) beyond a module scope. If so, it answers my question. On Fri, Jan 4, 2013 at 6:53 PM, Justin Holewinski < justin.holewinski at gmail.com> wrote: > Since a, b, and c are globals, how does the optimize *know* they are not > used elsewhere (e.g. another module)? > -------------- next part
2013 Jan 04
0
[LLVMdev] Compiler opt is turned off ?
I'm not sure what you mean by "use" check. If you compile this with LTO and multiple modules, and guarantee that you have the main function, yes, you could optimize this. In all other cases, it's not possible to eliminate any of the remaining loads or stores you see, because you have no guarantee about what else could read it. Heck, a conforming implementation of printf could
2013 Jan 18
1
[LLVMdev] How to generate 32 Bit executable ?
Hello, I have a very simple input llvm IR file. I wanted to generate a 32-BIT a.out executable from this, but, couldn't make it. By default it is 64 BIT. Is there any way to dictate it from the input LLVM file or I am missing anything. The command I used : clang test.ll I tried playing with "target datalayout" but no success yet. Thanks. -------------- next part --------------
2013 Jan 04
2
[LLVMdev] Compiler opt is turned off ?
Hello, I was trying to run few testcases and see how llvm optmizes different scenarios. I have a small testcase like: #include <stdio.h> int a, b, c; int main() { a = b + c; c = a; if (a == b) b = c; else b = a; printf( " a = %d \n ", a ); return 0; } The corresponding llvm IR is ( clang test.c -S -emit-llvm -o -
2009 Oct 12
3
[LLVMdev] Accessing Loop Variables
Hi, How do I access the loop variables in a loop. for(i = 0; i < N; i++) for(j = 0; j < M; j++) A[i][j+k] = i + j; Is there anyway for me to know that in A[i][j+k], i & j are loop variables whereas k is not! Regards, Prasenjit Chakraborty Performance Modeling and Analysis IBM Systems & Technology Lab
2009 Jan 12
2
error messgae
Hello, I am having problems getting one xlite clients to communicate through asterisk. I am getting an error message: chan_sip.c:15593 handle_request_register: Registration from '"chinmay chakraborty"<sip:1234 at 10.44.32.193 <sip%3A1234 at 10.44.32.193>>' failed for '10.44.32.193' - No matching peer found sip show peers Name/username Host
2007 Nov 26
2
OCFS2 on CentOS 4.5 for CRS/RAC
Hi, I sent an email to Mark Fisheh of Oracle Corp. & posted this issue at OTN under Linux thread this morning. I hope that someone among you might have experienced this and can help. On that basis, I am sending this to you too. I am stuck & will really appreciate if you can shed some light on this. Thanks. Anjan
2016 Apr 10
3
compler-rt, __aeabi_memcpy () possibly broken (ARM)
Hello, I recognized that compiler-rt's the implementation of __aeabi_memcpy simply branches to memcpy. The implementation of memcpy is not provided. So an externally provided memcpy () has to be used. (also applies to memmove, memset, memclr) On ARM I have seen implementations of memcpy () using floating-point registers (if compiled with NEON support). The is perfectly legal, as memcpy ()
2011 May 12
2
[LLVMdev] Header in bitcode format 3.0?
On May 12, 2011, at 12:30 AM, Sandeep Patel wrote: > On Wed, May 11, 2011 at 11:42 PM, Stuart Hastings <stuart at apple.com> wrote: >> >> On May 9, 2011, at 1:41 PM, Renato Golin wrote: >> >> [snip] >> >>> One example is the struct byval. The ARM back-end still doesn't >>> support struct byval (maybe now it does, I was away for a
2014 Jul 17
4
[LLVMdev] GCC/LLVM frame pointer incompatibility on ARM
On 07/16/2014 11:45 AM, Tim Northover wrote: >>> As has been mentioned several times (*), LLVM and GCC setup frame pointer to >> point to different stack slots on ARM. GCC's fp points to stack slot holding >> lr while LLVM's fp points at the next slot. > > This looks flipped from my tests. Both create an { fp, lr } struct; > GCC sets current fp to the address
2009 Oct 12
0
[LLVMdev] Accessing Loop Variables
On Oct 12, 2009, at 3:46 AM, Prasenjit Chakraborty wrote: > > Hi, > How do I access the loop variables in a loop. > > for(i = 0; i < N; i++) > for(j = 0; j < M; j++) > A[i][j+k] = i + j; > > Is there anyway for me to know that in A[i][j+k], i & j are loop > variables > whereas k is not! The ScalarEvolution analysis can help here.
2012 Nov 15
2
[LLVMdev] X86 rsqrt instruction generated
Hi, We have implemented the rsqrt instruction generation for X86 target architecture. We have introduced a flag -fp-rsqrt flag which controls the generatation of X86 rsqrt instruction generation. We have observed minor effects on precision due to rsqrt and hence has put these transformations under the mentioned flag. Note that -fp-rsqrt is only enabled with -enable-unsafe-fp-math flag presently.
2012 Nov 15
0
[LLVMdev] X86 rsqrt instruction generated
On Wed, Nov 14, 2012 at 10:43 PM, Chakraborty, Soham <Soham.Chakraborty at amd.com> wrote: > Hi, > > > > We have implemented the rsqrt instruction generation for X86 target > architecture. We have introduced a flag -fp-rsqrt flag which controls the > generatation of X86 rsqrt instruction generation. > > We have observed minor effects on precision due to rsqrt and
2013 Aug 29
6
[PATCH 2/3 v3] Refactor MSI restore call-chain to drop unnecessary argument
Driver init call graph under baremetal: driver_init-> msix_capability_init-> msix_program_entries-> msix_mask_irq-> entry->masked = 1 request_irq-> __setup_irq-> irq_startup-> unmask_msi_irq-> msix_mask_irq-> entry->masked = 0 So
2011 May 11
3
[LLVMdev] Header in bitcode format 3.0?
On May 9, 2011, at 1:41 PM, Renato Golin wrote: [snip] > One example is the struct byval. The ARM back-end still doesn't > support struct byval (maybe now it does, I was away for a while), The ARM backend now supports struct byval for APCS. Extending it to support AAPCS shouldn't be too difficult. Alas, I won't have time to revisit this in the near future. stuart
2014 Oct 17
5
[LLVMdev] Performance regression on ARM
> Chandler’s complex arithmetic changes are also in the range: r219557 in clang. We saw it change the code in mandel-2 significantly. mandel-2 is broken on hard FP ABI systems, btw. The reason is simply: we're emitting a call to __muldc3 with AAPCS VFP calling convention, however, the function expects softfp (AAPCS) calling conv and reads garbage from GP registers. I'm working on fix.
2012 Nov 27
2
order.max specification problem in the ar.ols function
Hello I am facing a curious problem.I have a time series data with which i want to fit auto-regressive model of order p, where p runs from 1:9.I am using a for loop which will fit an AR(p) model for each value of p using the *ar.ols* function. I am using the following code for ( p in 1:9){ a=ar.ols (x=data.ts, order.max=p, demean=T, intercept=T) } Specifying the *order.max* to be p, it gives me a
2014 Oct 18
3
[LLVMdev] Performance regression on ARM
Hi Chandler, That's embarrassing how weird this part of clang is. I have a provisional patch which fixes the problem but underlines clang's problems. I will submit it tonight for comments. суббота, 18 октября 2014 г. пользователь Chandler Carruth написал: > > On Fri, Oct 17, 2014 at 7:51 AM, Anton Korobeynikov < > anton at korobeynikov.info >