similar to: difference between llvm-gcc and clang

Hi Tim, Thanks for your reply. I know O4 is same as O3 now. I am wondering the bitcodes generated by llvm-gcc and clang are same, or almost same, I mean they are almost same, but maybe some newly-created optimization would exert impact. Best, Yuxi ________________________________________ From: Tim Northover [t.p.northover at gmail.com] Sent: Thursday, July 21, 2016 4:11 PM To: Yuxi Chen Cc:

Hi All, Does anyone know the meaning of -no-stack-slot-sharing flag in llvm? I can find this flag in llvm-2.8, but now I am using llvm-3.6.1, I couldn't use this flag via clang. Does anyone know the alternative one? Or there is no need to use this flag if we use some optimization, like O4? Another question is that I write a Pass, what I do is after analysis, I generate a .bc file, then run

On 6/20/16 3:46 PM, Yuxi Chen wrote: > Hi, > > Thanks for your reply. > But I still don't know how a transform pass updates a new analysis > pass after it modifies the IR. Can you explain it clearly? I am not > familiar with pass management and invocation. Passes can have methods that allow their internal state to be updated by other passes (the same way that their state

Hi, I want to copy some dependent statements, like a = b, b = c, from one basicblock to another basicblocks. Because of SSA, a = b, will be like %1 = load %b, store %1, %a. If I just use clone() method in Instruction class, it will be like <badref> = load %b, store <badref>, %a. If I need remap the virtual registers, this map just will affect the whole module? And how to use it? I am

Hi All, I am using clang to compile Mysql source code. Because I want to do some inter-procedural analysis, hopefully, I want to get a .o(bitcode) file(a module) containing all possible function declarations and definitions. Is it possible to do that ? Or you guys have some suggestions? To be clear, like Mysql, there is a mysqld routine, which is a major routine. I want to mysqld.o(which is

Hi all, I am newbie for llvm. I just create a global variable, there are some statements in my pass like: LoadInst* int64_64 = new LoadInst(pthreadPID, "", false, OptAplusOne); int64_64->setAlignment(8); int64_64->dump(); LoadInst* int32_65 = new LoadInst(gvar_int32_myFlag, "", false, OptAplusOne); int32_65->setAlignment(4);

On 6/19/16 4:28 AM, Mehdi Amini via llvm-dev wrote: > >> On Jun 18, 2016, at 10:44 PM, Yuxi Chen via llvm-dev >> <llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org>> wrote: >> >> Hi All, >> >> When I use llvm, I encounter a problem like "unable to schedule pass >> A required by C" >> I investigated deeper.

Hi All, When I use llvm, I encounter a problem like "unable to schedule pass A required by C" I investigated deeper. It's like: I have three passes, say A, B, C(all are on function level) A would modify IR code. (change instruction order) For pass B, I would use the result of pass A, I use addRequired<B>(), and &getAnalysis<B>(), it works. void

I see. My CPU is a general Core i7 Ivy bridge CPU. On Fri, Apr 10, 2015 at 6:48 PM, Bruce Hoult <bruce at hoult.org> wrote: > I suppose that depends on your CPU. Do you even have a CPU that supports > operations on <N x i1> as packed bits in vector registers? > > > On Sat, Apr 11, 2015 at 12:43 PM, zhi chen <zchenhn at gmail.com> wrote: > >> Yes, but my

On Thu, Sep 29, 2016 at 9:02 PM, Jonas Wagner via llvm-dev < llvm-dev at lists.llvm.org> wrote: > Hi, > > I am going to use LLVM for my Thesis. Is there any LLVM Virtual Machine to >> download. I have some problem with installing and configuring the LLVM, >> please let me have the virtual machine link to download if there is any. >> > > I don't know of

Yes, but my point is that there would be some overhead to do cast the <N x i1> vectortype to an integerNty. Is there any good way to check not all of these N bits in the vectortype are 0s? On Fri, Apr 10, 2015 at 5:37 PM, Bruce Hoult <bruce at hoult.org> wrote: > Sure, if you actually just want an i1 saying whether or not at least one > bit is set to 1, then comparing against 0

Thanks, Bruce. So, what is the easiest way to check if there is any bit set to 1 in a <N x i1> vector type? I used bitcast instruction to cast it into "iN" first and them compare iN to 0. Do you have a better way to do it? Thanks again. On Fri, Apr 10, 2015 at 5:22 PM, Bruce Hoult <bruce at hoult.org> wrote: > LLVM doesn't have a "logical neg" (or

How can I generate LLVM IR for both logical NEG (!)? For example, if I have Int32Ty a, For the bitwise NEG(~): c = ~a ; I can use the following API from LLVM: BinaryOperator *neg = BinaryOperator::CreateNeg(nbits, "bitwiseNEG", insertBefore); How, if I want to generate logical NEG: c = !a; what should I do for this? Thanks -------------- next part -------------- An HTML

Here's an example using the gcc toolchain for embedded 32 bit RISC-V (my HiFive1 board): #include <stdio.h> int foo(int i){ if (i < 100){ printf("%d\n", i); } return i; } int main(){ foo(10); return 0; } After compiling to a .o with -O2 -march=RV32IC we get (just looking at foo) 00000000 <foo>: 0: 1141 addi sp,sp,-16

By the way, since this is an optional code relaxation, we can think about it later. The first thing I would do is to add RISC-V support to lld without code shrinking relaxations, which I believe is doable by at most a few hundreds lines of code. On Wed, Jul 12, 2017 at 3:21 AM, Rui Ueyama <ruiu at google.com> wrote: > On Tue, Jul 11, 2017 at 9:14 PM, Bruce Hoult via llvm-dev < >

Thanks for the quick answer Bruce. So far as I can tell (from a quick read), this is really for integrated assemblers/disassemblers - but we use an external assembler. When invoking clang we would provide ‘-mcpu=chip_v1’ or ‘-mcpu=chip_v2’, and the mnemonic ‘LD32’ is only valid when compiling for ‘chip_v1’, while ‘LD.32’ is only valid when compiling for ‘chip_v2’. But I will study the

I can't see why you'd want to do this, no. -eric On Tue, Aug 19, 2014 at 8:02 PM, Isaac Dupree < ml at isaac.cedarswampstudios.org> wrote: > Is the C backend at all suitable to be adapted to emit OpenCL code? Or > do the target-dependence, and/or things that C can do but OpenCL can't, > make that hopeless? > -Isaac > > On 08/19/2014 03:08 PM, Carback,

>>> I'd like to emphasise in the latter one: "This option also relaxes the precision of >>> commonly used math functions." >> >> Isn't this the "libm" flag that is proposed in this thread? > > I don't know. I didn't see any definition of it. > > In my case I'm talking about allowing the use of lower precision but

On Jun 18, 2014, at 3:05 PM, Bruce Hoult <bruce at hoult.org> wrote: > On Thu, Jun 19, 2014 at 8:29 AM, Owen Anderson <resistor at mac.com> wrote: > Numerical analysis is hard. Every numerics expert I have ever worked with considers trying to re-invent floating point a cardinal sin of numerical analysis. Just don’t do it. You will miss important considerations, and you will

Hi All, While compiling libgcc, I find I have to deal with UMULO (overflow-aware unsigned multiplication) SDNode. UMULO returns the result of multiplication, and a boolean indicating overflow occurred or not. Our target's multiply instruction doesn't care (detect) overflow. I am wondering if I can always set the boolean to false. I am not sure about this as I see AArch64 [1] seems