Displaying 20 results from an estimated 10000 matches similar to: "Fwd: Problem of array index manipulation collection of LLVM IR"
2010 Sep 30
4
[LLVMdev] Illegal optimization in LLVM 2.8 during SelectionDAG? (Re: comparison pattern trouble - might be a bug in LLVM 2.8?)
Bill Wendling wrote:
> On Sep 29, 2010, at 12:36 AM, Heikki Kultala wrote:
>
>> On 29 Sep 2010, at 06:25, Heikki Kultala wrote:
>>
>>> Our architecture has 1-bit boolean predicate registers.
>>>
>>> I've defined comparison
>>>
>>> def NErrb : InstTCE<(outs I1Regs:$op3), (ins I32Regs:$op1,I32Regs:$op2), "", [(set
2010 Sep 29
1
[LLVMdev] comparison pattern trouble - might be a bug in LLVM 2.8?
On 29 Sep 2010, at 06:25, Heikki Kultala wrote:
> Our architecture has 1-bit boolean predicate registers.
>
> I've defined comparison
>
>
> def NErrb : InstTCE<(outs I1Regs:$op3), (ins I32Regs:$op1,I32Regs:$op2), "", [(set I1Regs:$op3, (setne I32Regs:$op1, I32Regs:$op2))]>;
>
>
>
>
> But then I end up having the following bug:
>
>
2010 Oct 01
0
[LLVMdev] Illegal optimization in LLVM 2.8 during SelectionDAG? (Re: comparison pattern trouble - might be a bug in LLVM 2.8?)
On Sep 30, 2010, at 2:13 AM, Heikki Kultala wrote:
> Bill Wendling wrote:
>> On Sep 29, 2010, at 12:36 AM, Heikki Kultala wrote:
>>
>>> On 29 Sep 2010, at 06:25, Heikki Kultala wrote:
>>>
>>>> Our architecture has 1-bit boolean predicate registers.
>>>>
>>>> I've defined comparison
>>>>
>>>> def
2010 Sep 29
0
[LLVMdev] comparison pattern trouble - might be a bug in LLVM 2.8?
On Sep 29, 2010, at 12:36 AM, Heikki Kultala wrote:
> On 29 Sep 2010, at 06:25, Heikki Kultala wrote:
>
>> Our architecture has 1-bit boolean predicate registers.
>>
>> I've defined comparison
>>
>> def NErrb : InstTCE<(outs I1Regs:$op3), (ins I32Regs:$op1,I32Regs:$op2), "", [(set I1Regs:$op3, (setne I32Regs:$op1, I32Regs:$op2))]>;
2017 Jun 19
2
LLVM behavior different depending on function symbol name
On Mon, Jun 19, 2017 at 12:06 PM, Mehdi AMINI <joker.eph at gmail.com> wrote:
> Hi,
>
> 2017-06-19 8:45 GMT-07:00 Andrew Kelley via llvm-dev <
> llvm-dev at lists.llvm.org>:
>
>> Greetings,
>>
>> I have a Zig implementation of ceil which is emitted into LLVM IR like
>> this:
>>
>> ; Function Attrs: nobuiltin nounwind
>> define
2017 Jun 19
4
LLVM behavior different depending on function symbol name
Greetings,
I have a Zig implementation of ceil which is emitted into LLVM IR like this:
; Function Attrs: nobuiltin nounwind
define internal fastcc float @ceil(float) unnamed_addr #3 !dbg !644 {
Entry:
%x = alloca float, align 4
store float %0, float* %x
call void @llvm.dbg.declare(metadata float* %x, metadata !649, metadata
!494), !dbg !651
%1 = load float, float* %x, !dbg !652
%2 =
2017 Sep 16
2
assertion triggered since update to llvm 5
When zig updated to llvm 5 we started hitting this assertion:
zig:
/home/andy/downloads/llvm-project/llvm/include/llvm/Support/Casting.h:106:
static bool llvm::isa_impl_cl<To, const From*>::doit(const From*) [with To
= llvm::Instruction; From = llvm::Value]: Assertion `Val && "isa<> used on
a null pointer"' failed.
I wonder if however this was caused by an
2017 Sep 17
2
assertion triggered since update to llvm 5
Can you please open a bug on bugzilla and attach the ir testcase? Your fix
doesn't look right (just hiding the assertion failure)
On Sep 17, 2017 10:45 AM, "Andrew Kelley via llvm-dev" <
llvm-dev at lists.llvm.org> wrote:
> What do you think about this patch?
>
> --- a/llvm/lib/Transforms/Scalar/NewGVN.cpp
> +++ b/llvm/lib/Transforms/Scalar/NewGVN.cpp
> @@
2017 Sep 17
4
assertion triggered since update to llvm 5
So, 90% of the time I've seen this, it was memory corruption, usually use
after free. I know I fixed one after 5.0 branched.
You should compile with address sanitizer enabled, and I suspect you will
find the issue quicky.
If not, we really need ir that reproduces it.
On Sun, Sep 17, 2017, 12:27 PM Andrew Kelley via llvm-dev <
llvm-dev at lists.llvm.org> wrote:
> I think I forgot to
2017 Oct 01
2
load with alignment of 1 crashes from being unaligned
Below is attached a full IR module that can reproduce this issue, but the
part to notice is this:
%Foo96Bits = type <{ i24, i24, i24, i24 }>
define internal fastcc i16 @main.0.1() unnamed_addr #2 !dbg !113 {
Entry:
%value = alloca %Foo96Bits, align 1
%b = alloca i24, align 4
%0 = bitcast %Foo96Bits* %value to i8*, !dbg !129
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %0, i8* bitcast
2018 Jul 25
2
A question to the DWARF experts on symbol indirection
> -----Original Message-----
> From: llvm-dev [mailto:llvm-dev-bounces at lists.llvm.org] On Behalf Of Tim
> Northover via llvm-dev
> Sent: Wednesday, July 25, 2018 3:07 AM
> To: Nat!
> Cc: LLVM Developers Mailing List
> Subject: Re: [llvm-dev] A question to the DWARF experts on symbol
> indirection
>
> Hi Nat!,
>
> On Wed, 25 Jul 2018 at 01:21, Nat! via
2016 Mar 23
2
[RFC] Lazy-loading of debug info metadata
> On 2016-Mar-23, at 07:17, Teresa Johnson <tejohnson at google.com> wrote:
>
>
>
> On Tue, Mar 22, 2016 at 7:28 PM, Duncan P. N. Exon Smith <dexonsmith at apple.com> wrote:
> I have some ideas to allow the BitcodeReader to lazy-load debug info
> metadata, and wanted to air this on llvm-dev before getting too deep
> into the code.
>
> Motivation
>
2018 Sep 25
1
Obtaining the origin function for a local var after inlining
On Wed, Sep 19, 2018 at 5:18 PM Adrian Prantl <aprantl at apple.com> wrote:
>
>
>
> > On Sep 19, 2018, at 4:08 AM, Alexander Potapenko <glider at google.com> wrote:
> >
> > On Tue, Sep 18, 2018 at 1:56 AM Adrian Prantl <aprantl at apple.com> wrote:
> >>
> >>
> >>
> >>> On Sep 17, 2018, at 6:59 AM, Alexander
2019 Jan 19
2
What does "preds" mean in a .ll file?
Hi,
I see things like this. What does it mean? Is it documented somewhere? Thanks.
; preds = %for.body
https://llvm.org/docs/LangRef.html
; <label>:91: ; preds = %88
%92 = load i8**, i8*** @glob_complete_word.matches, align 8, !dbg !99798
%93 = load i32, i32* @glob_complete_word.ind, align 4, !dbg !99799
%94 = sext i32 %93 to i64, !dbg !99798
2016 Mar 23
7
[RFC] Lazy-loading of debug info metadata
I have some ideas to allow the BitcodeReader to lazy-load debug info
metadata, and wanted to air this on llvm-dev before getting too deep
into the code.
Motivation
==========
Based on some analysis Mehdi ran (ping him for details), there are three
(related) compile-time bottlenecks we're seeing with `-flto=thin -g`:
a) Reading the large number of Metadata bitcode records in the global
2016 Mar 23
0
[RFC] Lazy-loading of debug info metadata
On Wed, Mar 23, 2016 at 9:31 AM, Duncan P. N. Exon Smith <
dexonsmith at apple.com> wrote:
>
> > On 2016-Mar-23, at 07:17, Teresa Johnson <tejohnson at google.com> wrote:
> >
> >
> >
> > On Tue, Mar 22, 2016 at 7:28 PM, Duncan P. N. Exon Smith <
> dexonsmith at apple.com> wrote:
> > I have some ideas to allow the BitcodeReader to
2016 Mar 23
1
[RFC] Lazy-loading of debug info metadata
> On 2016-Mar-23, at 09:42, Teresa Johnson <tejohnson at google.com> wrote:
>
>
>
> On Wed, Mar 23, 2016 at 9:31 AM, Duncan P. N. Exon Smith <dexonsmith at apple.com> wrote:
>
> > On 2016-Mar-23, at 07:17, Teresa Johnson <tejohnson at google.com> wrote:
> >
> >
> >
> > On Tue, Mar 22, 2016 at 7:28 PM, Duncan P. N. Exon Smith
2016 Mar 23
0
[RFC] Lazy-loading of debug info metadata
On Tue, Mar 22, 2016 at 7:28 PM, Duncan P. N. Exon Smith <
dexonsmith at apple.com> wrote:
> I have some ideas to allow the BitcodeReader to lazy-load debug info
> metadata, and wanted to air this on llvm-dev before getting too deep
> into the code.
>
> Motivation
> ==========
>
> Based on some analysis Mehdi ran (ping him for details), there are three
> (related)
2018 Mar 15
1
[SelectionDAG] DbgValue nodes aren't transferred
> On Mar 14, 2018, at 7:55 PM, Se Jong Oh <sejooh at microsoft.com> wrote:
>
> Hi Jonas,
>
> Thanks for taking a look! It makes linear-dbg-value.ll pass for my target by producing DEBUG_VALUEs correctly. I also tried a simple function with few operations and confirmed DEBUG_VALUEs which are not produced without trasferDbgValues in SetPromotedInteger.
That’s great news! Do
2016 Dec 23
0
distinct DISubprograms hindering sharing inlined subprogram descriptions
A few disjoint thoughts; sorry they're so delayed (I skimmed the responses below, and I think these are still relevant/not covered elsewhere).
Firstly, why *should* DISubprogram definitions be distinct? There were two reasons this was valuable (this was from before there was a cu: link).
- It helped to fix long-standing bugs in the IRLinker, where uniqued-DISubprograms in different compile