similar to: Dynamic selection of assembly mnemonic strings

Thanks for the quick answer Bruce. So far as I can tell (from a quick read), this is really for integrated assemblers/disassemblers - but we use an external assembler. When invoking clang we would provide ‘-mcpu=chip_v1’ or ‘-mcpu=chip_v2’, and the mnemonic ‘LD32’ is only valid when compiling for ‘chip_v1’, while ‘LD.32’ is only valid when compiling for ‘chip_v2’. But I will study the

Problem compiling R. version: 0.64.2 machine: SGI O2 OS: IRIX6.5 CC cc FC f77 MAKE GNU make 3.75 Here is part of the the output for make. make[2]: Leaving directory `/usr/people/faculty/math/mgass/stage/R/R-0.64.2/src/include' make[2]: Entering directory `/usr/people/faculty/math/mgass/stage/R/R-0.64.2/src/appl' cc -g -OPT:IEEE_NaN_inf=ON -I../include

hello, little problem compiling openssh 4.6p1 on irix using mipspro 7.4.x. c99 -o sshd sshd.o auth-rhosts.o auth-passwd.o auth-rsa.o auth-rh-rsa.o sshpty.o sshlogin.o servconf.o serverloop.o auth.o auth1.o auth2.o auth-options.o session.o auth-chall.o auth2-chall.o groupaccess.o auth-skey.o auth-bsdauth.o auth2-hostbased.o auth2-kbdint.o auth2-none.o auth2-passwd.o auth2-pubkey.o

Hi, Trying to build llvm on irix mips with gcc 3.4.6 and receiving the following types of errors ld32: ERROR 33 : Unresolved text symbol "std::basic_string<char, std::char_traits<char>, std: :allocator<char> >::basic_string(std::basic_string<char, std::char_traits<char>, std::allocator <char> > const&)" -- 1st referenced by

Dear R-help, I'm trying to compile R-1.4.1 on Irix, and run into the following error when making R.bin: The linker (ld32) complained that "gzeof", "gzgetc", "gztell", and "gzseek" are unresolved symbols in connection.o. Are these supposed to be in libz.a? My suspicion is that maybe the libz.a on this system is outdated. Any hints? TIA! Andy

Hi, Thanks to Profs. Ripley and Tierney for their tips, I compiled zlib from source and gotten further. Here's where I get stuck, when it tries to compile the tcltk package: ld32: FATAL 12 : Expecting n32 objects: /usr/local/lib/libtcl8.3.so is n64. Now I'm confused. Sounds like 32-bit vs. 64-bit problem. What can I do at this point? (This is on Irix.) Regards, Andy

Full_Name: Laurent Gautier Version: 1.3.0-patched OS: IRIX 6.5 Submission from: (NULL) (130.225.67.199) During the configuration step, things do not go perfect: The file config.log has : configure:3754: gcc -o conftest -g -O2 -I/usr/freeware/include -I/usr/local/include -static conftest.c -L/usr/local/lib 1>&5 ld32: FATAL 9 : I/O error (/usr/lib32/mips3/nonshared/crt1.o): No such

SGI IRIX 6.5.9 gcc 2.95.2 gnu make ./configure make make install /usr/include/string.h:67: warning: conflicting types for built-in function `memcpy' /usr/include/string.h:74: warning: conflicting types for built-in function `memcmp' /usr/include/string.h:95: warning: conflicting types for built-in function `memset' /usr/include/string.h:97: warning: conflicting types for built-in

Hello, I'm trying to compile libogg, libvorbis, libao, and vorbis-tools on an SGI Octane running Irix6.5.22. libogg configures and compiles without a problem. I installed it in usr/local/lib. When I moved on to libvorbis trouble began. The configure script made the following complaint: checking for Ogg... 12269:./conftest: rld: Error: unresolvable symbol in ./conftest:

Hello Villmow, Is it your backend EFI Byte Code Virtual Machine?? Would you mind to give me an example about what pseudo instruction you add?? thanks a lot yi-hong 2011/1/19 Villmow, Micah <Micah.Villmow at amd.com> > I have this same problem in our backend. I solve it by adding a pseudo > instruction at instruction selection that transforms @R1 into R1, so only a > single

I have this same problem in our backend. I solve it by adding a pseudo instruction at instruction selection that transforms @R1 into R1, so only a single pattern is required. I then can propogate the pseudo instruction after instruction selection. Micah From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On Behalf Of Lu Mitnick Sent: Tuesday, January 18, 2011 10:29 AM

Hi, I'd like to modify MachineBasicBlock contents within a MachineFunctionPass on the basis of how many CPU cycles the assembly instructions corresponding to the MBB take. I'm using the AVR backend and the number of CPU cycles every AVR assembly operation takes is openly available. Is there any straightforward way of getting the opcode mnemonics corresponding to a MachineInstr? I've

"Villmow, Micah" <Micah.Villmow at amd.com> writes: > I have this same problem in our backend. I solve it by adding a pseudo > instruction at instruction selection that transforms @R1 into R1, so > only a single pattern is required. I then can propogate the pseudo > instruction after instruction selection. What's the rationale behind this approach? It seems a bit

Hello all, I am at the adding Instruction Set stage of adding new target support into LLVM. There is a single instruction op mnemonic with multiple operand forms. For example: Add R1, R2 & Add @R1, R2. I found that there is similar case in x86 instruction set, such like ADD reg, reg & ADD mem, reg. However, the solution of x86 is adding suffix of instruction and translating instruction op

Hi Frederick, > Trying to build llvm on irix mips with gcc 3.4.6 and receiving the following types of errors > > ld32: ERROR 33 : Unresolved text symbol "std::basic_string<char, std::char_traits<char>, std: > :allocator<char> >::basic_string(std::basic_string<char, std::char_traits<char>, std::allocator > <char> > const&)" -- 1st

Thanks to Peter Dalgaard and Suchandra Thapa for answering my question! Before I settle on a particular option, I'd like to ask one more question if I may: Are there any practical advantages to compiling R to 64-bit vs 32-bit? Regards, Andy > -----Original Message----- > From: Peter Dalgaard BSA [mailto:p.dalgaard at biostat.ku.dk] > Sent: Thursday, April 18, 2002 4:19 PM > To:

The R-1.2.1 builds have gone fairly smoothly on most of my UNIX architectures, but there were many warnings reported by the picky SGI compiler that could be eliminated in future releases. Generally, I have found the SGI compilers very helpful in ferreting out portability problems, unused and/or obsolete variables, unexpected datatype coercions, etc., and they compile faster than any other

Hello all, Is there an easy way to get the human-readable opcode mnemonic (e.g., "MOV32ri64", "CMP32ri8", "JLE_1") for a MachineInstr? I am writing a backend analysis pass for security research, where the idea is for a researcher to examine the output of my pass and identify instructions from it for use in an attack. Right now I'm representing unique

> And that is why I think you should just consider "bt $x,y" to be > trivially the same thing and not at all ambiguous. Because there is > ABSOLUTELY ZERO ambiguity when people write > > bt $63, mem > > Zero. Nada. None. The semantics are *exactly* the same for btl and btq > in this case, so why would you want the user to specify one or the > other? I

On Sun, Jul 14, 2013 at 11:26 AM, Ramkumar Ramachandra <artagnon at gmail.com> wrote: > > I was trying to show a reduced case where gas doesn't complain, but > llvm-mc does. Try compiling this with llvm-mc, and you'll get: Ok. So your commit message and explanation was pure and utter tripe, and the real reason you want this is that llvm-mc is broken. Please fix llvm-mc