Displaying 20 results from an estimated 300 matches similar to: "[LLD] thunk implementation correctness depends on order of input section."
2017 Sep 19
1
Do I need to modify the AddrLoc of LLD for ARC target?
Hello Leslie,
The errors coming from the gnu assembler are due to the file being
assembled in Arm state, to get rid of the errors you'll either need to
put a .thumb directive in the file, or pass -mthumb to the assembler
via arm-linux-gnu-gcc -Wa,-mthumb (I think).
I'm not able to explain what you are seeing in your print out as it
doesn't quite match the map file. Looking at your
2017 Sep 18
1
Do I need to modify the AddrLoc of LLD for ARC target?
Hello Leslie,
I don't know quite what to say as I don't know precisely what your
question is? If I am not being precise enough please can you put some
explicit questions in? From what I can see in the output, here are
some comments.
>From your arc mapfiles it looks like that in the output both linker's
have given the .text output section the correct base address given the
2017 Sep 14
4
Do I need to modify the AddrLoc of LLD for ARC target?
Hello Leslie,
I think we are going to need to know a bit more about the ELF ABI for
what looks like the ArcCompact before we can help you.
LLD's calculation of P (the place to be relocated) is as it is in the
generic ELF specification. The Rel.Offset corresponds to the ELF
r_offset field. This is covered by: "For a relocatable file, the value
is the byte offset from the beginning of the
2016 Feb 03
2
lld dynamic relocation creation issue
Hi all,
Working on lld aarch64 support I came across an issue where I am not sure which
would be best design approach to solve.
The aarch64 R_AARCH64_ABS64 relocation for PIC/PIE build requires a dynamic
relocation (R_AARCH64_RELATIVE) with the value set as the addend of the
relocation. For instance, when linking the crtbeginS.o which contains:
Relocation section '.rela.init_array' at
2017 Jul 11
8
[LLD] Linker Relaxation
Here's an example using the gcc toolchain for embedded 32 bit RISC-V (my
HiFive1 board):
#include <stdio.h>
int foo(int i){
if (i < 100){
printf("%d\n", i);
}
return i;
}
int main(){
foo(10);
return 0;
}
After compiling to a .o with -O2 -march=RV32IC we get (just looking at foo)
00000000 <foo>:
0: 1141 addi sp,sp,-16
2017 Mar 10
3
[ELF] [RFC] Padding between executable sections
Hi,
I was doing some experiments with LLD and noticed that it pads out
OutputSections with null bytes in all cases (as far as I could tell).
However, for executable sections on some targets, 0x00 forms part of an
executable instruction that is not nop. In particular, for x86_64 targets
at least, the sequence 0x00 0x00 is an add instruction. This can result in
confusing disassembly.
For example,
2016 Oct 19
3
LLD: creating linker-generated sections as input sections instead of output sections
On Wed, Oct 19, 2016 at 3:34 AM, Peter Smith via llvm-dev <
llvm-dev at lists.llvm.org> wrote:
> Thanks for the RFC.
>
> I'm in favour of the option of creating InputSections for some linker
> generated content. I think it would add extra flexibility to the
> linker. ARM's proprietary linker uses the equivalent of InputSections
> with a pseudo linker defined
2017 Mar 01
2
[lld] We call SymbolBody::getVA redundantly a lot...
On Tue, Feb 28, 2017 at 11:39 PM, Rui Ueyama <ruiu at google.com> wrote:
> I also did a quick profiling a few months ago and noticed just like you
> that scanRelocations consumes a fairly large percentage of overall
> execution time. That caught my attention because at the time I was looking
> for a place that I can parallelize.
>
> scanRelocations is not parallelizable
2016 Oct 19
2
LLD: creating linker-generated sections as input sections instead of output sections
I would suggest converting only part of linker generated sections to
input sections to reduce amount of code changes.
For example it's unlikely that SymbolTableSection or
StringTableSection would ever require such treatment, so why
converting them to input sections?
2016-10-19 11:03 GMT+03:00 George Rimar <grimar at accesssoftek.com>:
>>This idea popped up in the review thread
2017 Mar 01
2
[lld] We call SymbolBody::getVA redundantly a lot...
On Tue, Feb 28, 2017 at 12:10 PM, Rui Ueyama <ruiu at google.com> wrote:
> I don't think getVA is particularly expensive, and if it is not expensive
> I wouldn't cache its result. Did you experiment to cache getVA results? I
> think you can do that fairly easily by adding a std::atomic_uint64_t to
> SymbolBody and use it as a cache for getVA.
>
You're right,
2017 Jan 04
5
RFC: LLD range extension thunks
I'm about to start working on range extension thunks in lld. This is
an attempt to summarize the approach I'd like to take and what the
impact will be on lld outside of thunks. I'm interested if anyone has
any constraints the approach will break, alternative suggestions, or
is working on something I'll need to take account of?
I expect range extension thunks to be important for
2016 Oct 18
3
RFC: LLD: creating linker-generated sections as input sections instead of output sections
This idea popped up in the review thread for https://reviews.llvm.org/D25627
.
Problem:
Currently, LLD creates special sections that are not just concatenations of
input sections but need link-time data generation, such as .got, .plt,
interp, .mips.options, etc., as output sections. We have OutputSectionBase
subclasses (e.g. GotSection, PltSection, etc.) to create data. Even though
this scheme
2010 Jul 28
2
[LLVMdev] build errors while cross compiling llvm-gcc for ARM
Hello,
I'm using gold linker now to see if there can be any performance gain. Also
using latest gcc version (4.4.4) and latest binutils.
But when I'm compiling llvm-gcc, I'm getting this error.
/home/jal/llvm-gcc-4.2-2.7.source/host-i686-pc-linux-gnu/gcc/xgcc
-B/home/jal/llvm-gcc-4.2-2.7.source/host-i686-pc-linux-gnu/gcc/
-B/usr/local/arm-v7a8-linux-gnueabi/bin/
2019 Mar 14
2
inline assembly matching error
I'm trying to add support for inline assembly and I keep getting this error:
<jal>
"<inline asm>:1:2: error: invalid instruction"
which is due to the fact that MatchInstructionImpl() returns Match_MnemonicFail.
This function is tablegen'ed in XXXGenAsmMatcher.inc and for some reason it can't find JAL even though I can clearly see it in both MatchTable0[] and
2016 Jun 22
2
[LLD] thunk implementation correctness depends on order of input section.
First of all thanks for finding the bug.
I agree with Rui that right now we can manage without general thunk
infrastructure. Let's provide at least a few "thunk" implementation
and after that reconsider necessity of common thunk framework. As to
MIPS there is one more type of thunk (keyword is .MIPS.stubs) and one
more optimization of current thunk (putting a thunk in the beginning
2006 May 02
1
pairwise.t.test: empty p-table
Hi list-members
can anybody tell me why
> pairwise.t.test(val, fac)
produces an empty p-table. As shown below:
Pairwise comparisons using t tests with pooled SD
data: val and fac
AS AT Fhh Fm Fmk Fmu GBS Gf HFS Hn jAL Kol R_Fill
AT - - - - - - - - - - - - -
Fhh - - - - - - - - - - - - -
Fm - - - - - - -
2017 Jan 05
2
RFC: LLD range extension thunks
Hello Rui,
Thanks for the comments
- Synthetic sections and rewriting relocations
I think that this would definitely be worth trying. It should remove
the need for thunks to be represented in the core data structures, and
would allow .
It would also mean that we wouldn't have to associate symbols with
thunks as the relocations would directly target the thunks. ARM
interworking makes reusing
2013 Feb 27
2
[LLVMdev] Mips backend 3.2 va_arg possible bug
i have this code
typedef long long L;
typedef integer I;
void test2(auto L p0, auto L p1, auto L p2, auto L p4, ...)
{
va_list select;
va_start (select, p4);
report( va_arg(select,L) );
report( va_arg(select,I) );
report( va_arg(select,L) );
2020 Mar 30
2
LLD bug causing objcopy ELF to binary generation to create large binaries
Hi Andrew,
Thanks for the background and context.
"In your issue, just to clarify, is the ELF output from LLD also
"large", or is it just the output from the llvm-objcopy operating on
that ELF that is "large"? Do you have a simple sample to demonstrate
this issue?"
The ELF size is actually smaller, compared to what was generated from
LLVM 7.x. (~900Kb vs
2013 Feb 28
0
[LLVMdev] Mips backend 3.2 va_arg possible bug
Could you file a bug?
On Wed, Feb 27, 2013 at 2:47 AM, Stavropoulos Nikos <
n.stavropoulos at think-silicon.com> wrote:
> i have this code
>
> typedef long long L;
> typedef integer I;
> void test2(auto L p0, auto L p1, auto L p2, auto L p4, ...)
> {
> va_list select;
>
> va_start (select, p4);
>
> report( va_arg(select,L) );
> report(