similar to: Loop vectorizer Queires

Hi, in the past few weeks we were able to confirm that the LLVM's JIT compiler can be used for our research project. This was confirmed for x86-64 architecture (with very good performance results by the way). Now, one of our real target architecture is the Intel Xeon Phi (KNC) accelerator in a native execution model. When cross-compiling LLVM (3.4 RC1) for Xeon Phi with CMake following

Hi, We have the same difficulties. KNC (dubbed k1om in compiler utils) is a 64-bit device with 8087-compatible scalar arithmetics and non-standard vector arithmetics. More specifically, the widely used variant of 64-bit ABI implemented by LLVM involves xmm registers, while KNC does not have xmm-s and instead has zmm-s (512-bit wide). This makes standard 64-bit binaries you're trying to

Hello Elena, Thanks for info! Since Knights Landing (KNL) is going to be shipped also in form of host CPU, it will have to have open-source support :) But given that KNL is only announced 1 month ago, we should expect up to 1.5 years for it to become somewhat wide-spread, i.e. 2014-2015. Meanwhile, I still hope to perform some KNC evaluation, so answers to above questions are much appreciated!

Hi, It seems LLVM-MC is broken with Avx512? $ echo "vinserti32x4 \$1, %xmm21, %zmm5, %zmm17"|./Release+Asserts/bin/llvm-mc -assemble -arch=x86-64 -show-encoding -x86-asm-syntax=att .text vinserti32x4 $1, %xmm21, %zmm5, %zmm17 # encoding: [0x62,0xa3,0x55,0x48,0x38,0xcd,0x01] $ echo "0x62,0xa3,0x55,0x48,0x38,0xcd,0x01" |./Release+Asserts/bin/llvm-mc -disassemble

Hello Dmitry, I'm working on KNL backend and plan to push it to the open source once the ISA becomes public. We do not plan to support KNC architecture in open source. - Elena -----Original Message----- From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On Behalf Of Dmitry Mikushin Sent: Friday, July 12, 2013 01:51 To: LLVM Developers Mailing List Subject:

Hi Hal! Thanks, but unfortunately it didn't help. The exact same assembler instructions are generated for both 3.8 (yesterday) and trunk (from today). So, this really looks like a bug. Best, Frank On 06/29/2016 03:48 PM, Hal Finkel wrote: > Hi Frank, > > I recommend trying trunk LLVM. AVX-512 development has been very active recently. > > -Hal > > ----- Original

Dear all, I'm interested to analyse what could be done with current LLVM trunk to deliver basic Intel MIC support. Let's say, for basic level we'd want just scalar code execution, no threading, no zmm vectors. Attached verbose in text, but functionally very simple patch copy-pastes x86 and x86_64 backends into 32-bit and 64-bit K1OM. In the end of the message you can find how simple

Hi! When compiling the attached module with the JIT engine on an Intel KNL I see wrong code getting emitted. I attach a complete exploit program which shows the bug in LLVM 3.8. It loads and JIT compiles the module and prints the assembler. I stumbled on this since the result of an actual calculation was wrong. So, it's not only the text version of the assembler also the machine

Well, you’ll probably need to specify which CPU for the instructions to be recognized as valid encodings. -mcpu=knl doesn’t seem sufficient, though, so there’s probably something more going on. Elena, do you know what’s happening here? It’s important that the disassembler work with the new instructions as well as the assembler. I looked but didn’t see any disassembler tests for avx512. -Jim On

Hi Frank, I recommend trying trunk LLVM. AVX-512 development has been very active recently. -Hal ----- Original Message ----- > From: "Frank Winter via llvm-dev" <llvm-dev at lists.llvm.org> > To: "LLVM Dev" <llvm-dev at lists.llvm.org> > Sent: Wednesday, June 29, 2016 2:41:39 PM > Subject: [llvm-dev] avx512 JIT backend generates wrong code on <4

It is my actual target architecture ________________________________ From: Doerfert, Johannes <jdoerfert at anl.gov> Sent: Saturday, March 23, 2019 1:30 PM To: J S Cc: via llvm-dev Subject: Re: [llvm-dev] Generating object files more efficiently I copied "-march=XYZ" from your original email, you have to replace it with your actual target architecture or simply drop it.

Johannes, I tried the last one and it gave me this: error: unknown target CPU 'XYZ' note: valid target CPU values are: nocona, core2, penryn, bonnell, atom, silvermont, slm, goldmont, goldmont-plus, tremont, nehalem, corei7, westmere, sandybridge, corei7-avx, ivybridge, core-avx-i, haswell, core-avx2, broadwell, skylake, skylake-avx512, skx, cascadelake,

1) Is there actually a 32-bit mode for MIC? 32-bit ELFs are not recognized, so... There is no 32-bit KNC. 2) MIC ISA is 32-bit ISA (no SSE/MMX) plus 256-bit AVX-like vectors? No, 256-bit vectors are not supported. KNC is scalar ISA (Knights Corner supports a subset of the Intel 64 Architecture instructions) + 512-bit vectors + masks 3) then does MIC calling convention permit generation of

On Thu, Jun 26, 2014 at 10:23 AM, Adam Nemet <anemet at apple.com> wrote: > > > On Jun 25, 2014, at 7:05 PM, Jun Koi <junkoi2004 at gmail.com> wrote: > > > > > On Thu, Jun 26, 2014 at 5:47 AM, Adam Nemet <anemet at apple.com> wrote: > >> Hi Jun, >> >> On Jun 25, 2014, at 8:14 AM, Jun Koi <junkoi2004 at gmail.com> wrote: >>

-march for clang and -march for llc do different things unfortunately. -march for clang at least on x86 is the same as -mcpu in llc. Which is an artifact of gcc compatibility. ~Craig On Sat, Mar 23, 2019 at 1:40 PM Doerfert, Johannes via llvm-dev < llvm-dev at lists.llvm.org> wrote: > Oh, my bad. > > > Idk why llc seems to know that architecture but clang does not. > >

I assume compiler knows that your only have 2 input values that you just added together 1000 times. Despite the fact that you stored to a[i] and b[i] here, nothing reads them other than the addition in the same loop iteration. So the compiler easily removed the a and b arrays. Same with 'c', it's not read outside the loop so it doesn't need to exist. So the compiler turned your

Currently I compile my C code in 2 steps in order to generate .o files clang -emit-llvm -c foo.c -o foo.bc llc -march=XYZ foo.bc -filetype=obj Is there a way to generate either .o or .elf files in just 1 command? Thanks. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20190323/da9b3c18/attachment.html>

Hello Elena, > There is no 32-bit KNC. Are you sure about this? From "System V Application Binary Interface K1OM Architecture Processor Supplement Version 1.0", p. 124: | A.1 Execution of 32-bit Programs | | The K1OM processors are able to execute 64-bit K1OM and also 32-bit ia32 programs. I'm really really looking for this opportunity, because we want to extend our kernel

when i generate code with 72 loop iterations. the compiler generates code with using avx512 zmm operations 4 times (16x4=64) and remaining 8 iterations are handled by routine mov operations with EAX register. wouldn't it be better if it uses ymm for remaining 8 iterations as it does when iteration count is between 8 and 15. same for xmm and so on. please correct me if i am wrong. Thank

On Tue, Aug 20, 2013 at 07:44:39AM +0200, leroy christophe wrote: > > > Find attached two patches I have in order to build klibc 2.0.2 > against kernel 3.8.13 > We had to introduce those patches when going from kernel 3.6 to kernel 3.7 > Hope it helps. > those patches are wrong and again very brittle. just use the way it is described in `make help': A) cd ~/src/linux