Displaying 20 results from an estimated 300 matches similar to: "Gluing arbitrary nodes together"
2007 Apr 18
2
[PATCH] Simplify smp_call_function*() by using common implementation
smp_call_function and smp_call_function_single are almost complete
duplicates of the same logic. This patch combines them by
implementing them in terms of the more general
smp_call_function_mask().
[ Jan, Andi: This only changes arch/i386; can x86_64 be changed in the
same way? ]
[ Rebased onto Jan's x86_64-mm-consolidate-smp_send_stop patch ]
Signed-off-by: Jeremy Fitzhardinge
2007 Apr 18
2
[PATCH] Simplify smp_call_function*() by using common implementation
smp_call_function and smp_call_function_single are almost complete
duplicates of the same logic. This patch combines them by
implementing them in terms of the more general
smp_call_function_mask().
[ Jan, Andi: This only changes arch/i386; can x86_64 be changed in the
same way? ]
[ Rebased onto Jan's x86_64-mm-consolidate-smp_send_stop patch ]
Signed-off-by: Jeremy Fitzhardinge
2020 Jul 09
5
[PATCH v3 0/4] iomap: Constify ioreadX() iomem argument
Hi,
Multiple architectures are affected in the first patch and all further
patches depend on the first.
Maybe this could go in through Andrew Morton's tree?
Changes since v2
================
1. Drop all non-essential patches (cleanups),
2. Update also drivers/sh/clk/cpg.c .
Changes since v1
================
https://lore.kernel.org/lkml/1578415992-24054-1-git-send-email-krzk at
2020 Feb 19
14
[RESEND PATCH v2 0/9] iomap: Constify ioreadX() iomem argument
Hi,
Changes since v1
================
https://lore.kernel.org/lkml/1578415992-24054-1-git-send-email-krzk at kernel.org/
1. Constify also ioreadX_rep() and mmio_insX(),
2. Squash lib+alpha+powerpc+parisc+sh into one patch for bisectability,
3. Add acks and reviews,
4. Re-order patches so all optional driver changes are at the end.
Description
===========
The ioread8/16/32() and others have
2020 Feb 19
14
[RESEND PATCH v2 0/9] iomap: Constify ioreadX() iomem argument
Hi,
Changes since v1
================
https://lore.kernel.org/lkml/1578415992-24054-1-git-send-email-krzk at kernel.org/
1. Constify also ioreadX_rep() and mmio_insX(),
2. Squash lib+alpha+powerpc+parisc+sh into one patch for bisectability,
3. Add acks and reviews,
4. Re-order patches so all optional driver changes are at the end.
Description
===========
The ioread8/16/32() and others have
2020 Feb 19
14
[RESEND PATCH v2 0/9] iomap: Constify ioreadX() iomem argument
Hi,
Changes since v1
================
https://lore.kernel.org/lkml/1578415992-24054-1-git-send-email-krzk at kernel.org/
1. Constify also ioreadX_rep() and mmio_insX(),
2. Squash lib+alpha+powerpc+parisc+sh into one patch for bisectability,
3. Add acks and reviews,
4. Re-order patches so all optional driver changes are at the end.
Description
===========
The ioread8/16/32() and others have
2018 Sep 04
2
Change password and add user on RO filesystem
Hi everyone
I'm trying to create system with RO root filesystem, so i'm using
/etc/sysconfig/readonly-root along wih /etc/rwtab and /etc/statetab.
Apart of numerous problems with services running on RO filesystem (which
i'm constantly resolving adding entries to /etc/statetab) one thing
popped up. I'm unable to add user or change his password. Error is
'cannot lock
2020 Nov 18
2
Should I add intrinsics to write my own automatic reference counting passes?
My experience with LLVM is limited, but I am trying to figure out how to
add optimizations for automatic reference counting. The GC documentation
mentions that patch-points could be useful, but it does not state how they
would be useful. If this is a FAQ, please let me know...
So this is my idea at this point:
The context is a C++ like language with an aggregate type that is always
reference
2020 Jan 08
17
[PATCH v2 0/9] iomap: Constify ioreadX() iomem argument
Hi,
Changes since v1
================
https://lore.kernel.org/lkml/1578415992-24054-1-git-send-email-krzk at kernel.org/
1. Constify also ioreadX_rep() and mmio_insX(),
2. Squash lib+alpha+powerpc+parisc+sh into one patch for bisectability,
3. Add Geert's review,
4. Re-order patches so all optional driver changes are at the end.
Description
===========
The ioread8/16/32() and others have
2020 Jan 07
21
[RFT 00/13] iomap: Constify ioreadX() iomem argument
Hi,
The ioread8/16/32() and others have inconsistent interface among the
architectures: some taking address as const, some not.
It seems there is nothing really stopping all of them to take
pointer to const.
Patchset was really tested on all affected architectures.
Build testing is in progress - I hope auto-builders will point any issues.
Todo
====
Convert also string versions (ioread16_rep()
2020 Jan 07
21
[RFT 00/13] iomap: Constify ioreadX() iomem argument
Hi,
The ioread8/16/32() and others have inconsistent interface among the
architectures: some taking address as const, some not.
It seems there is nothing really stopping all of them to take
pointer to const.
Patchset was really tested on all affected architectures.
Build testing is in progress - I hope auto-builders will point any issues.
Todo
====
Convert also string versions (ioread16_rep()
2020 Jan 07
21
[RFT 00/13] iomap: Constify ioreadX() iomem argument
Hi,
The ioread8/16/32() and others have inconsistent interface among the
architectures: some taking address as const, some not.
It seems there is nothing really stopping all of them to take
pointer to const.
Patchset was really tested on all affected architectures.
Build testing is in progress - I hope auto-builders will point any issues.
Todo
====
Convert also string versions (ioread16_rep()
2011 Aug 22
2
[LLVMdev] Reviving the new LLVM concurrency model
On Mon, Aug 22, 2011 at 9:55 AM, Jianzhou Zhao <jianzhou at seas.upenn.edu> wrote:
> In the definition of 'monotonic' ordering,
> ... "If an address is written monotonically by one thread, and other
> threads monotonically read that address repeatedly, the other threads
> must eventually see the write"...
It's supposed to mean that if you have a something
2018 Sep 14
5
RFC: Adding a !thread.private metadata
Problem
LLVM's memory model for NonAtomic accesses is generally fairly weak, but
explicitly disallows inserting stores that didn't occur in the original
program. This is required for any potentially shared location, but is
overkill for any memory location which is provably only accessed by a
single thread.
My particular motivating example is a single thread private field in our
2011 Aug 22
4
[LLVMdev] Reviving the new LLVM concurrency model
On Mon, Aug 22, 2011 at 11:17 AM, Jianzhou Zhao <jianzhou at seas.upenn.edu> wrote:
> On Mon, Aug 22, 2011 at 1:02 PM, Eli Friedman <eli.friedman at gmail.com> wrote:
>> On Mon, Aug 22, 2011 at 9:55 AM, Jianzhou Zhao <jianzhou at seas.upenn.edu> wrote:
>>> In the definition of 'monotonic' ordering,
>>> ... "If an address is written
2011 Aug 22
0
[LLVMdev] Reviving the new LLVM concurrency model
On Mon, Aug 22, 2011 at 1:02 PM, Eli Friedman <eli.friedman at gmail.com> wrote:
> On Mon, Aug 22, 2011 at 9:55 AM, Jianzhou Zhao <jianzhou at seas.upenn.edu> wrote:
>> In the definition of 'monotonic' ordering,
>> ... "If an address is written monotonically by one thread, and other
>> threads monotonically read that address repeatedly, the other
2007 Oct 31
3
[PATCH 0/7] (Re-)introducing pvops for x86_64 - Consolidation part
Hi folks,
Here is the result of the latest work on the pvops front, after the x86
arch merge. From the functionality point of view, almost nothing was
changed, except for proper vsmp support - which was discussed, but not
implemented before - and the introduction of smp_ops in x86_64, which eased
the merging of the smp header.
Speaking of the merge, a significant part (although not majority) of
2007 Oct 31
3
[PATCH 0/7] (Re-)introducing pvops for x86_64 - Consolidation part
Hi folks,
Here is the result of the latest work on the pvops front, after the x86
arch merge. From the functionality point of view, almost nothing was
changed, except for proper vsmp support - which was discussed, but not
implemented before - and the introduction of smp_ops in x86_64, which eased
the merging of the smp header.
Speaking of the merge, a significant part (although not majority) of
2016 Jan 28
1
[cfe-dev] Adding sanity to the Atomics implementation
On Thu, Jan 28, 2016 at 08:32:31AM -0800, Reid Kleckner via llvm-dev wrote:
> I think Clang should continue to duplicate this information, the same way
> we duplicate target datalayout strings. Other than that, sure, we can let
> LLVM expand IR operations to libcalls. I don't immediately see a problem
> with that.
Note that a libcall doesn't necessarily mean using locks. With
2011 Aug 22
0
[LLVMdev] Reviving the new LLVM concurrency model
On Mon, Aug 22, 2011 at 3:02 PM, Eli Friedman <eli.friedman at gmail.com> wrote:
> On Mon, Aug 22, 2011 at 11:17 AM, Jianzhou Zhao <jianzhou at seas.upenn.edu> wrote:
>> On Mon, Aug 22, 2011 at 1:02 PM, Eli Friedman <eli.friedman at gmail.com> wrote:
>>> On Mon, Aug 22, 2011 at 9:55 AM, Jianzhou Zhao <jianzhou at seas.upenn.edu> wrote:
>>>> In