similar to: Adding BB input/output registers during ISel

So if I first create the value in an entry BB and then build a CopyToReg but then I have to read it in a BB that loops back to itself, with it's own CopyToReg at the end, then I have two CopyToReg nodes for the same value. In this case, I need to create 3 virt regs, 1 for each CopyToReg and a third for the CopyFromReg in the beginning of the loop BB, right? And then I need to build a PHI

Hi all, I would like my optimization pass to change an object's address space that is created by llvm.lifetime.start intrinsic. Because I want to be able to identify them later in a codegen pass. I can get a pointer from the intrinsic using CallInst::getArgOperand() function. However, I don't know what to do with it (or if it is the pointer that I want). How can I change its address space?

On 5 November 2014 11:51, Hal Finkel <hfinkel at anl.gov> wrote: > ----- Original Message ----- > > From: "Reid Kleckner" <rnk at google.com> > > To: "Philip Reames" <listmail at philipreames.com> > > Cc: "LLVM Developers Mailing List" <llvmdev at cs.uiuc.edu> > > Sent: Wednesday, November 5, 2014 12:54:30 PM >

So if I create a value with a DAG.getUndef(myVT); call during instruction legalization, how can I access that value as input in another BB/DAG (also during instruction legalization) without worrying about live-ins and/or phi nodes? Can I create a single virtual register and build both a CopyToReg and a CopyFromReg node with it? I assumed that would break SSA. Perhaps I should have said that what

> > This seems fine to me. The optimizer can (soundly) conclude that %p is > dead after the "lifetime.end" (for the two instructions), and dead before > the "lifetime.start" (for the *single* instruction in that basic block, > *not* for the previous BB). This seems like the proper result for this > example, am I missing something? > What if I put that in

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<div class="socmaildefaultfont" dir="ltr" style="font-family:Arial;font-size:10.5pt" ><div dir="ltr" style="font-family:Arial;font-size:10.5pt" ><div dir="ltr" >Matthias,</div> <div dir="ltr" > </div> <div dir="ltr" >Thanks for the response.</div> <div

Hi, If the special handling in the meg2reg pass is to look for lifetime intrinsics, shouldn't it cast to <IntrisicInst> and then use getInstrinsicID to check for lifetime_start and lifetime_end ? The thing that I don't understand is the following piece of code, which finds all the users and cast it to <Instruction> then eraseFromParent(). How can this guarantee that it only

<div class="socmaildefaultfont" dir="ltr" style="font-family:Arial;font-size:10.5pt" ><div class="socmaildefaultfont" dir="ltr" style="font-family:Arial;font-size:10.5pt" ><div dir="ltr" > </div> <div dir="ltr" >Hi all,</div> <div dir="ltr" > </div> <div

----- Original Message ----- > From: "guoqing zhang" <gqzhang81 at gmail.com> > To: llvmdev at cs.uiuc.edu > Sent: Friday, January 30, 2015 4:29:16 AM > Subject: [LLVMdev] About user of bitcast/GEP instruction > > Hi, > > > In PromoteMemoryToRegister.cpp, it seems to rely on the fact that the > only users of bitcast/GEP instruction are lifetime

Hi, In PromoteMemoryToRegister.cpp, it seems to rely on the fact that the only users of bitcast/GEP instruction are lifetime intrinsics (llvm.lifetime.start/end). I did some searching in llvm/test folder, it seems to be true. However, by reading LLVM IR manual, I don't see any restriction stated on the possible user of bitcast/GEP instruction. So my question is who impose the restriction ?

On 5 November 2014 12:48, Hal Finkel <hfinkel at anl.gov> wrote: > ----- Original Message ----- > > From: "Nick Lewycky" <nlewycky at google.com> > > To: "Hal Finkel" <hfinkel at anl.gov> > > Cc: "Reid Kleckner" <rnk at google.com>, "LLVM Developers Mailing List" < > llvmdev at cs.uiuc.edu> > >

Hi, The compilation of the following code void f(int *a, int b[], int n) { int i; for(i=0; i< n; ++i) a[i] = b[i]; } gives the IR: define void @f(i32* nocapture %a, i32* nocapture %b, i32 %n) nounwind { %1 = icmp sgt i32 %n, 0 br i1 %1, label %.lr.ph, label %._crit_edge .lr.ph: ; preds = %0 %tmp = zext i32 %n to i64 br label %2 ;

Hello, I have a question regarding PGO instrumented BBs (I use IR-level instrumentation). It seems that instrumented BBs do not match between the two compilations for profile-gen and profile-use for some cases. Here is an example from SPECcpu 2006 lbm (a simple case consisting of just two modules). In the first compilation, we have 5 instrumentation points for the main function as follows: $

> > I want to know, given a function, How do I know which block is entry > > block, which blocks are exit blocks? Is there any efficient way to > > dicectly get that information? > > Given a function you can always use Function::getEntryBlock() to get the > entry block. You need to scan the function to get the returning nodes. You could also use UnifyExitNode (a pass

Classification: UNCLASSIFIED Caveats: NONE A similar question has been posted in the past but never answered. My question is this: for probit analysis, how do you program a 95% confidence interval for the LD50 (or LC50, ec50, etc.), including a heterogeneity factor as written about in "Probit Analysis" by Finney(1971)? The heterogeneity factor comes into play through the chi-squared

Dear All, My servers running on CentOS 5.5 x86_64 with kernel 2.6.18.194.17.4.el gigabyte motherboard and 2 harddisks (seagate 500GB). My CentOS box configured RAID 1, yesterday and today I had the same problem on 2 servers with same configuration. See the following error messages for details: EXT3-fs: INFO: recovery required on readonly filesystem. EXT3-fs: write access will be enabled during

I'd like to get a quick feedback on the lifetime.end metadata kind I'm considering using. I'm planning to use it in cases where lifetime.end intrinsics do not give lifetime bounds that are tight enough. As an example of when lifetime.end cannot provide a tight lifetime bound, consider the following program: void test111(int n) { if (n < 10) { string str = "One";

Hi, I'm trying to find a place where objects held in nv40_context->state.hw[] and nv40_screen->state[] are being unreferenced during pipe_context destruction. Currently I'm observing that these objects are not unreferenced and since they hold reference to buffer objects, the buffer objects themselves are not unreferenced as well (for example color buffer or z buffer). In

Hello, I am working on my research using LLVM. I need to obtain the following information at each object file during compilation, and want to store them into the new section that I define. Currently the target architecture is x86_64 with ELF format. *a) actual size of basic blocks in bytes to be emitted * *b) number of fixups (adjusted in MCAssembler.cpp) that belong to each basic block * I