Displaying 20 results from an estimated 400 matches similar to: "[MemorySSA] Potential CachingMemorySSAWalker bug"
2016 May 02
2
[MemorySSA] Potential CachingMemorySSAWalker bug
I've put my changes to EarlyCSE that trigger this case up on phab here:
http://reviews.llvm.org/D19821. These changes depend on
http://reviews.llvm.org/D19664 so that will need to be applied first.
With these changes applied, the original attached .ll file should
trigger this bug when compiled with opt -early-cse -early-cse-use-memoryssa
On 5/2/2016 2:34 PM, Daniel Berlin wrote:
>
2016 May 02
2
[MemorySSA] Potential CachingMemorySSAWalker bug
I suspect something is pulling the RHS of the memorydef and caching it for
calls it should not be used for.
In particular, i suspect we are about to discover we can't cache the
results from both versions of getClobberingMemoryAccess together, or that
the cache is not always getting consistently written.
On Mon, May 2, 2016 at 11:16 AM, George Burgess IV <
george.burgess.iv at
2016 Jun 27
2
[MemorySSA] Potential bug in MemoryUse defining access calculation
Hey All,
I've come across what I believe to be a bug in MemorySSA. George, I
wasn't sure if this was a known issue that you'll be addressing in your
upcoming walker caching changes or not, so I haven't investigated it
very much. The test case is attached. The bug is that the defining
access for the second load is set to the loop MemoryPhi node instead of
being liveOnEntry as
2018 Feb 09
1
PHI nodes for atomic variables
Dear Daniel Berlin,
I just tried MemorySSA analysis and get the next IR.
However, I feel confused by the result.
Specifically, why instruction *%3* relates to a *MemoryDef*. According to
my understanding,
I think *%3* should be related to a *MemoryUse*, right?
; Function Attrs: uwtable
define void @_Z2f1v() #3 personality i32 (...)* @__gxx_personality_v0 {
entry:
; 1 = MemoryDef(liveOnEntry)
2018 Aug 09
2
llvm MemorySSA def-use chains
Hi,
I have a question about how llvm MemorySSA works, as seems I misunderstand something.
Consider following code snippet and corresponding IR with MemorySSA annotations (got with opt -print-memoryssa)
void foo(int* b) {
int a = 0;
int d = 12;
if (b) {
a = 42;
d = 32;
}
int c = a;
int e = d;
}
; Function Attrs: noinline nounwind optnone uwtable
2017 Feb 17
2
[MemorySSA] inserting or removing memory instructions
Hi guys,
a question about updating memory SSA:
Is it expected that e.g insertion of MemoryDef doesn't change all dominated
uses?
For example test case CreateLoadsAndStoreUpdater produces:
define void @F(i8*) {
; 1 = MemoryDef(liveOnEntry)
store i8 16, i8* %0
; 4 = MemoryDef(1)
store i8 16, i8* %0
br i1 true, label %2, label %3
; <label>:2: ;
2017 Feb 17
2
[MemorySSA] inserting or removing memory instructions
In particular, if you want to add support, the right way to know what to
rename is (off the top of my head)
add a flag or something to have renamepass reset all uses it sees (you only
have to change the uses, defs are all linked together and thus already
fixed by the updater). Right now it only does that if they have no
defining access.
Make it skip blocks already in the visited set (the
2018 Aug 10
2
llvm MemorySSA def-use chains
Hi,
try adding some alias analysis to the pipeline: see examples in
llvm/test/Analysis/MemorySSA/*.ll
for example assume.ll has
; RUN: opt -aa-pipeline=basic-aa -passes='print<memoryssa>,verify<memoryssa>'
without basic-aa the memory ssa will safely assume that the stores to
%a and %d alias which may be proven disjoint by one of the alias
analyses.
On Thu, Aug 9, 2018 at 8:37
2017 Dec 19
4
MemorySSA question
Hi,
I am new to MemorySSA and wanted to understand its capabilities. Hence I
wrote the following program (test.c):
int N;
void test(int *restrict a, int *restrict b, int *restrict c, int *restrict
d, int *restrict e) {
int i;
for (i = 0; i < N; i = i + 5) {
a[i] = b[i] + c[i];
}
for (i = 0; i < N - 5; i = i + 5) {
e[i] = a[i] * d[i];
}
}
I compiled this program using
2017 Dec 19
2
MemorySSA question
On Tue, Dec 19, 2017 at 9:10 AM, Siddharth Bhat via llvm-dev <
llvm-dev at lists.llvm.org> wrote:
> I could be entirely wrong, but from my understanding of memorySSA, each
> def defines an "abstract heap state" which has the coarsest possible
> definition - any write will be modelled as a "new heap state".
>
This is true for def-def relationships, but
2016 Oct 30
0
[PATCH] D26127: [MemorySSA] Repair AccessList invariants after insertion of new MemoryUseOrDef.
On Sun, Oct 30, 2016 at 4:08 PM, Bryant Wong <
3.14472+reviews.llvm.org at gmail.com> wrote:
>
> On Sun, Oct 30, 2016 at 6:48 PM, Daniel Berlin <dberlin at dberlin.org>
> wrote:
>
>> In particular:
>> "
>> I'm not so sure that it's sufficient. Suppose, for instance, that I
>> wanted to insert a MemoryDef between 1 and 2 in the below
2016 Oct 31
1
[PATCH] D26127: [MemorySSA] Repair AccessList invariants after insertion of new MemoryUseOrDef.
On Sun, Oct 30, 2016 at 5:03 PM, Bryant Wong <
3.14472+reviews.llvm.org at gmail.com> wrote:
> To give this a bit of context, this patch stems from issues that I've
> encountered while porting MemCpyOpt to MSSA.
>
Okay. I'm not sure i would try to port instead of just rewrite. The whole
goal of MemorySSA is to enable us to write memory optimizations in non-N^2
ways.
If
2017 Dec 21
4
Hoisting in the presence of volatile loads.
On 12/20/2017 03:49 PM, Alina Sbirlea via llvm-dev wrote:
> +Philip to get his input too.
> I've talked with George offline, and here's a summary:
>
> In D16875 <https://reviews.llvm.org/D16875>, the decision made was:
> "The LLVM spec is ambiguous about whether we can hoist a non-volatile
> load above a volatile load when the loads alias. It's probably
2018 Jun 29
2
Cleaning up ‘br i1 false’ cases in CodeGenPrepare
Hi,
I have come across a couple of cases where the code generated after
CodeGenPrepare pass has "br i1 false .." with both true and false
conditions preserved and this propagates further and remains the same
in the final assembly code/executable.
In CodeGenPrepare::runOnFunction, ConstantFoldTerminator (which
handles the br i1 false condition) is called only once and if after
the
2015 Apr 28
2
[LLVMdev] alias set collapse and LICM
On Mon, Apr 27, 2015 at 4:21 PM, Daniel Berlin <dberlin at dberlin.org> wrote:
> You can't win here (believe me, i've tried, and better people than me have
> tried, for years :P).
> No matter what you do, the partitioning will never be 100% precise. The
> only way to solve that in general is to pairwise query over the
> partitioning.
>
> Your basic problem is
2016 Jun 27
0
[MemorySSA] Potential bug in MemoryUse defining access calculation
This is definitely a caching bug related to this code:
1038 // Don't try to optimize this phi again if we've already tried
to do so.
1039 if (!Q.Visited.insert(PHIPair).second) {
1040 ModifyingAccess = CurrAccess;
1041 break;
1042 }
We don't differentiate elsewhere between having stopped at a phi because we
were path walking and discovered that path
2016 Apr 20
4
[LICM][MemorySSA] Converting LICM pass to use MemorySSA to avoid AliasSet collapse issue
1) Sounds good. This isn’t holding me up so I’ll just try to keep an eye out for these changes.
2) I’ve attached an example IR file and debug log of where the caching is going bad. It depends on my changes to EarlyCSE, but hopefully it is clear from the debug output what is going on. Let me know if there is a better way to get this repro case to you. Also, I’ll be on IRC for the
2016 Apr 21
2
[LICM][MemorySSA] Converting LICM pass to use MemorySSA to avoid AliasSet collapse issue
Hi George,
After digging a little deeper, it appears that readonly calls showing up as MemoryDefs is only happening on an EarlyCSE test that is using the new pass manager (test/Transforms/EarlyCSE/basic.ll test5 if you’re curious), so I suspect it is an issue with the new pass manager setup code for either MemorySSA, my changes to EarlyCSE, the test run command line or something else not
2016 Apr 20
2
[LICM][MemorySSA] Converting LICM pass to use MemorySSA to avoid AliasSet collapse issue
Hi Daniel,
Thanks for the info. I’ve started looking into converting EarlyCSE to use MemorySSA first since 1) I don’t think it needs any additional MemorySSA update API and 2) the particular case I’m looking at needs EarlyCSE to catch more load cases before LICM to be profitable.
I have a prototype working, but have run into two issues:
1) readonly calls are treated as clobbers by
2018 Feb 08
0
PHI nodes for atomic variables
Let me try to help.
On Thu, Feb 8, 2018 at 12:13 PM, Qiuping Yi via llvm-dev <
llvm-dev at lists.llvm.org> wrote:
> Thanks for your explanation.
>
> Do you mean that LLVM will not maintain the def-use chain for atomic
> variables?
>
It is not a variable at the LLVM level.
At the source level, it is a variable.
At the LLVM IR level, it is lowered into memory operations.
All