similar to: Add Call instruction in IR for a non-existing function

Hi, Is there a way to get instruction's offset at compile time with llvm for ARM? I am trying to create a map between instructions at compile time and this run-time info. Since PC is a relative value, I am trying to use the instruction's offset as a constant property of instruction to create this map. I think offset information should be available to create the executable, if so where to

Yes, I have done exactly the same. The wawanalyzer is the same. I changed ARM.h and ARMTargetMachine.cpp in the tager/arm folder. then I make tool/llc and lib folder. On Tue, Nov 17, 2015 at 10:55 AM, John Criswell <jtcriswel at gmail.com> wrote: > On 11/17/15 12:16 AM, fateme Hoseini via llvm-dev wrote: > > Hi, > So, I run my pass in X86 target with llc command and it printed

Hi, So, I run my pass in X86 target with llc command and it printed out "hello****". Now I am trying to do the same pass for ARM target. So I did exactly what I did for X86 as mentioned in my previous posts. When I run the following command: llc -march=arm test.ll -o test nothing prints out. I did the same for MIPS target too and I got no result. Can anyone tell me what I'm doing

Thank you so much. That helped alot. Fami On Wed, Nov 4, 2015 at 9:40 AM, John Criswell <jtcriswel at gmail.com> wrote: > On 11/3/15 7:54 PM, fateme Hoseini wrote: > > Dear John, > Thank you so much for your help. I looked at those documents. Could you > kindly answer the following questions: > > Does it mean that I have to make my own backend target in order to write

Dear John, Thank you so much for your help. I looked at those documents. Could you kindly answer the following questions: Does it mean that I have to make my own backend target in order to write a machine pass even if I want to run a simple machinefunction pass? for example,if I want my pass to get MIPS instructions as an input, I have to copy all the files from mips target and add a file to it

Hello everyone, I am trying to write a code to do the following: 1. Get an ARM machine instruction 2. Find destination register of that instruction that has been written 3. set a bit in a vector, according to that register number. (Since it's ARM, I have a 15 bit vector) It means if I have : add r0, r1, r0 I want to get r0 as dest reg and set the index 0 of my vector to 1. I get my machine

Hi everyone, I am a LLVM newbie. I need to write a machinefunction pass for my project. This should be an analyzer of the machine code to do some profiling. I have written a couple of function passes for front end, but it seems they are completely different. I searched through forum and llvm documents, but couldn't find anything useful or questions were unanswered. Can anyone reference me to

Hi everyone, I am a new commer and I 'm tying to use LLVM to cross compile a code. I want to cross compile to MIPS and the host is the default x86. The more I read the document the more confused I get. I see documents on cross-compiling to ARM. But some install some gcc packages, while some use clang. I don't know where to start and how to do it. Is this just enough to run a command line

Dear Tim, Thank you for your thorough reply. So, based on your reply I get every operand and check them to be (isDef && !isimplicit). Now my problem is that it gives me the physical register number.i.e, for example, instead of r0, it return %physreg66. Could you please help me on how to convert these physical register number to the ARM related register? I mean the 15 GPRs in ARM. Thank

Hello everyone, As I mentioned in my previous posts,I am using a machinefunction pass to find all the loops in the program and do some analysis on them. I have completed my pass now and it works correctly. but the only issue is that,I have noticed that if I have two functions in my program, and one of them is part of the loop for another one ,by using runonmachinefunction(), I will get one loop

Hi, Is it possible to add a spill code (a pair of store /load ) to the machinecode in a pass before the instruction emitter? If so, how can I calculate the address (offset to the sp) for the spill store/load instructions? Thanks -------------- next part -------------- An HTML attachment was scrubbed... URL:

Hi Does LLVM dynamically run the program to obtain profiling information like branch weight? if so, can we access the information regarding this run like the number of instructions that have been executed dynamically between two specific points of the program? Thanks -------------- next part -------------- An HTML attachment was scrubbed... URL:

Ryan Taylor via llvm-dev <llvm-dev at lists.llvm.org> writes: > r0 gets overwritten inside the loop (assuming dst, src, src), is ldr > r0, [r5] needed to initialize r0 for the loop at each iteration? Register allocation should handle that if the load is hoisted. I'm with the others. The printf is the most likely culprit. -0David > On Thu, Mar 28, 2019

Hi, I read your post in LLVM forum. I want to use getAnalysisUsage(AnalysisUsage &AU) to get MachineLoopInfo. I have used this on my passes before but, this time I am trying to get this information in ScheduleDAGRRList scheduler class. There is no runonmachinefunction function. Do you know how I can implement this? Regards, Fateme I will appreciate it you can help me with this problem.

Hi all, I have a package that is specific to a task I was repetitively using a few years ago. I now needed to run it again with new data. However I am told it was built with an older version or R and will not work. How can I tweak the package so it will run on 11.1? It was a one-off product and has not been maintained. Is there a way to "unpackage" it and repackage it to work? I

Hello all, I am looking at the assembly code of a loop body which is created by applying O3 optimization. Here it is: .LBB4_19: @ %for.body.91 @ =>This Inner Loop Header: Depth=1 ldr r0, [r5] mov r1, r8 add r0, r0, r7 vldr s0, [r0] mov r0, r6 vcvt.f64.f32 d0, s0 vmov

Hi, I emailed about a week ago but did not get any response back This my second attempt. I understood that xm save -c (checkpointing feature) was included in Xen 3.1, but after taking days to have Xen running it seems that Xen 3.1 does not support VM (PVM or HVM) checkpointing. Is there any pseudo-stable version of Xen that supports checkpointing? cc

Hi: I've configured an asterisk server with A102d sangoma's card and the E1 link.I want to dial outside number using the E1 Link.How can I dial a phone number?Is this true? exten => 123,1,Dial(ZAP/1/phone number) I'd appreciate any help. -------------- next part -------------- An HTML attachment was scrubbed... URL:

Hi: I want to use asterisk1.2 but I don't know which version of asterisk1.2 and zaptel1.2 is best.Please offer me one version of asterisk and zaptel and libpri.How about asterisk1.2.24 and zaptel1.2.20.1 and libpri1.2.5?And do they work togather well? Best regards. --------------------------------- Pinpoint customers who are looking for what you sell. -------------- next part

I'm trying to generate the equivalent of this function dynamically in llvm (a la http://llvm.org/docs/tutorial/JITTutorial1.html) but after half a day of searching I still haven't found how to create the equivalent of the & (address of) operator in the llvm API, more exactly how do I obtain the i8* from the i32 below void fn(int x) { another_fn(&x); } thanks for any