Displaying 20 results from an estimated 300 matches similar to: "DAGIR"
2009 Jan 29
3
Plot dagger symbol in R
Dear all,
I would like to plot the dagger symbol in R (like LaTeX's \dagger).
However, I was unable to do so.
First, I thought maybe dagger actually exists just like the degree
symbol:
plot(0:1,0:1, type="n")
text(x=0.5, y=0.5, labels=expression(degree))
plot(0:1,0:1, type="n")
text(x=0.5, y=0.5, labels=expression(dagger))
However, this was not very successful. New
2014 Apr 02
3
[LLVMdev] decompiler
Hi -
Not sure if anyone else saw this or cares about a decompiler (not
personally tested)
https://github.com/draperlaboratory/fracture
I wonder if they have been in contact with anyone in the community in
getting this upstreamed. Does it look interesting to anyone else?
(thoughts/random comments/feedback)
2014 Apr 03
2
[LLVMdev] decompiler
On Thu, Apr 3, 2014 at 11:50 AM, Jevin Sweval <jevinsweval at gmail.com> wrote:
> On Wed, Apr 2, 2014 at 1:57 AM, "C. Bergström" <cbergstrom at pathscale.com> wrote:
>> Hi -
>>
>> Not sure if anyone else saw this or cares about a decompiler (not personally
>> tested)
>> https://github.com/draperlaboratory/fracture
>>
>> I wonder if
2015 Mar 13
2
[LLVMdev] Lifting ASM to IR
> On Thu, Mar 12, 2015 at 05:44:02PM -0700, Daniel Dilts wrote:
>> Does there exist a tool that could lift a binary (assembly for some
>> supported target) to LLVM IR? If there isn't, does this seem like
>> something that would be feasible?
There's plenty of variations on the idea: Revgen/S2E, Fracture, Dagger
(my own), libcpu, several closed-source ones used by
2008 Feb 17
2
Mac OS X 2.5.1 / reg-plot.R / tr (PR#10781)
In building R 2.6.2 from source for Mac OS X 2.5.1 (with
i686-apple-darwin9-gcc-4.0.1), 'make check' fails. The failure is in
reg-plot.R, and occurs because Mac OS X's 'tr' command (invoked by Rdiff
to strip carriage returns) regards the dagger sign in reg-plot.ps as an
illegal byte sequence.
I'm surprised that this doesn't seem to have been reported before, but
it
2015 Mar 13
2
[LLVMdev] Lifting ASM to IR
Does there exist a tool that could lift a binary (assembly for some
supported target) to LLVM IR? If there isn't, does this seem like
something that would be feasible?
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2018 Mar 05
2
[RFC] llvm-mca: a static performance analysis tool
Thanks Andrea for working on this!
I’ve been willing to do this for quite some time now. Looks like procrastination was the right approach here ;).
> On Mar 2, 2018, at 9:33 AM, Andrew Trick via llvm-dev <llvm-dev at lists.llvm.org> wrote:
>
> +Ahmed
>
>> On Mar 2, 2018, at 6:42 AM, Andrea Di Biagio <andrea.dibiagio at gmail.com <mailto:andrea.dibiagio at
2018 Mar 06
3
[RFC] llvm-mca: a static performance analysis tool
> On Mar 5, 2018, at 6:14 PM, Andrew Trick via llvm-dev <llvm-dev at lists.llvm.org> wrote:
>
>
>
>> On Mar 5, 2018, at 3:38 PM, Quentin Colombet <qcolombet at apple.com <mailto:qcolombet at apple.com>> wrote:
>>
>> When Ahmed and I worked on the decompiler, we first targeted MC. Going to MI was more difficult and really wouldn’t have gotten us a
2015 Mar 13
3
[LLVMdev] Lifting ASM to IR
On 3/12/15 8:14 PM, Daniel Dilts wrote:
> On Thu, Mar 12, 2015 at 6:33 PM, Ahmed Bougacha
> <ahmed.bougacha at gmail.com <mailto:ahmed.bougacha at gmail.com>> wrote:
>
> > On Thu, Mar 12, 2015 at 05:44:02PM -0700, Daniel Dilts wrote:
> >> Does there exist a tool that could lift a binary (assembly for some
> >> supported target) to LLVM IR?
2019 Feb 22
3
RFC: [DebugInfo] Improving Debug Information in LLVM to Recover Optimized-out Function Parameters
Hi,
We have done some investigation. Please find my comment inlined bellow.
>
> On 14.02.2019. 20:20, Quentin Colombet wrote:
>> Hi all,
>>
>> As much as possible I would rather we avoid any kind of metadata in MIR
>> to express the semantic of instructions.
>> Instead I would prefer that each back provides a way to interpret what
>> an instruction is
2018 Mar 06
0
[RFC] llvm-mca: a static performance analysis tool
> On Mar 5, 2018, at 3:38 PM, Quentin Colombet <qcolombet at apple.com> wrote:
>
> When Ahmed and I worked on the decompiler, we first targeted MC. Going to MI was more difficult and really wouldn’t have gotten us a lot of benefits. Instead, Ahmed pushed for directly decompiling to IR (look for dagger).
Thanks for the pointer Quentin.
> I would actually be in favor for more
2016 Jun 03
2
Custom assembler subset
On Fri, Jun 3, 2016 at 11:53 AM, Ahmed Bougacha <ahmed.bougacha at gmail.com>
wrote:
> -llvmdev at cs.uiuc.edu, that list isn't in use anymore.
>
> On Wed, Jun 1, 2016 at 4:48 PM, Kenneth Adam Miller via llvm-dev
> <llvm-dev at lists.llvm.org> wrote:
> > Hello all,
> >
> > I would like to restrain the compiler that I build on my local box from
>
2018 Mar 06
0
[RFC] llvm-mca: a static performance analysis tool
> On Mar 5, 2018, at 6:28 PM, Matthias Braun <mbraun at apple.com> wrote:
>
>
>
>> On Mar 5, 2018, at 6:14 PM, Andrew Trick via llvm-dev <llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org>> wrote:
>>
>>
>>
>>> On Mar 5, 2018, at 3:38 PM, Quentin Colombet <qcolombet at apple.com <mailto:qcolombet at
2014 Aug 18
8
[LLVMdev] C Backend Ressurected
Hi All,
2 of my summer interns (Aimee Dipietro and Greg Simpson) used their time over the summer to resurrect the LLVM C Backend:
https://github.com/draperlaboratory/llvm-cbe
Improvements include recovery of simple for/while loops (instead of goto), better variable naming, inline asm support, and making it work on a more recent version of llvm. I believe they used the repository here as a
2019 Feb 14
2
RFC: [DebugInfo] Improving Debug Information in LLVM to Recover Optimized-out Function Parameters
Hi all,
As much as possible I would rather we avoid any kind of metadata in MIR to express the semantic of instructions.
Instead I would prefer that each back provides a way to interpret what an instruction is doing. What I have in mind is something that would generalize what we do in the peephole optimizer for instance (look for isRegSequenceLike/getRegSequenceInputs and co.) or what we have for
2018 Mar 02
0
[RFC] llvm-mca: a static performance analysis tool
+Ahmed
> On Mar 2, 2018, at 6:42 AM, Andrea Di Biagio <andrea.dibiagio at gmail.com> wrote:
>
> There are a number of people on llvm-dev who can explain better than I how to decompile into MachineInstrs. I’m not totally opposed to checking in something that works with MCInstr, but this does run strongly contrary to the design of LLVM’s subtarget support.
>
> That would be
2008 Sep 23
1
Problem during porting R-2.7.2 on HP-UP 11.11 PA-Risc
Dear "R"-Team,
we had some problem to install R-2.7.2 on HP-UX 11.11 on PA-Risc platform.
1.) i load down the Software and made a extract of the tar-file in a
specific Directory.
2.) i follow the instructions on the INSTALL file:
./configure
3.) during "configure" we got a error message see below:
checking for history_truncate_file... no
configure: error:
2006 Feb 09
3
[JOB] RoR/PHP Developer needed - London, SW2
NO AGENCIES PLEASE
With that out the way, we (http://www.firebox.com) are looking for a
web developer to join our existing small development team.
Here''s the posting from our website[1]:
====
Web Developer (ref W200)
Reporting to: Technical Director
This permanent, full-time role involves developing the Firebox website
and internal admin tools. You will be working in a small team on
2003 Mar 06
3
Some questions.....
Hi all,
I need some help, advice or whatever you can explain to me because I haven''t
got a clear idea about how to do the following assembly, and I''d be very
grateful if I got some help from an expert like you.
I''m trying to build a system which represents the following:
I''ve got a hosts unit (host1, host 2, ...) which have IP in the network 192
2015 May 13
7
[LLVMdev] [PATCH][RFC] HSAIL Target
Hi,
AMD would like to propose including an LLVM backend for the HSAIL
target. Patches for review are attached and can also be found at
https://github.com/HSAFoundation/HLC-HSAIL-Development-LLVM/ on the
hsail-review branch. Most of the recent work is visible on the
hsail-1.0f branch, which is based on an LLVM commit approximately 1
month before 3.6 branched. The hsail-review branch is the