Displaying 20 results from an estimated 10000 matches similar to: "[GSoC 2016] Need more info on Add a MachineModulePass"
2016 Mar 18
2
[GSoC 2016] Need more info on Add a MachineModulePass
*Vivek Pandya*
On Fri, Mar 18, 2016 at 10:03 PM, Quentin Colombet <qcolombet at apple.com>
wrote:
> Hi Vivek,
>
> On Mar 16, 2016, at 1:00 PM, vivek pandya via llvm-dev <
> llvm-dev at lists.llvm.org> wrote:
>
> Hello,
>
> Probably this may be too late to start thinking about this project but I
> think this is particularly useful feature for LLVM.
>
2016 Mar 20
2
[GSoC 2016] Need more info on Add a MachineModulePass
On 3/18/16 12:33 PM, Quentin Colombet via llvm-dev wrote:
> Hi Vivek,
>
>> On Mar 16, 2016, at 1:00 PM, vivek pandya via llvm-dev
>> <llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org>> wrote:
>>
>> Hello,
>>
>> Probably this may be too late to start thinking about this project
>> but I think this is particularly useful
2016 Jan 22
8
[GlobalISel][RFC] Thoughts on MachineModulePass
Hi,
In the initial thread of the proposal for GlobalISel, I have mentioned that it may be interesting to have a kind of MachineModulePass.
Marcello mentioned this would be useful for their current pipeline.
I am interested in knowing:
1. If anyone else is interested for such concept?
2. What kind of information should we make accessible in an hypothetical MachineModule? I.e., how do you plan to
2016 May 11
3
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
*Vivek Pandya*
On Wed, May 11, 2016 at 10:02 AM, vivek pandya <vivekvpandya at gmail.com>
wrote:
>
>
> *Vivek Pandya*
>
>
> On Wed, May 11, 2016 at 9:43 AM, Mehdi Amini <mehdi.amini at apple.com>
> wrote:
>
>>
>> On May 10, 2016, at 6:06 PM, Hal Finkel <hfinkel at anl.gov> wrote:
>>
>>
>>
>>
2016 May 18
2
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
*Vivek Pandya*
On Wed, May 18, 2016 at 11:25 PM, Quentin Colombet <qcolombet at apple.com>
wrote:
>
> On May 18, 2016, at 10:46 AM, vivek pandya <vivekvpandya at gmail.com> wrote:
>
>
>
> *Vivek Pandya*
>
>
> On Wed, May 11, 2016 at 4:01 PM, Hal Finkel <hfinkel at anl.gov> wrote:
>
>>
>> ------------------------------
>>
>>
2016 May 18
2
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
*Vivek Pandya*
On Wed, May 11, 2016 at 4:01 PM, Hal Finkel <hfinkel at anl.gov> wrote:
>
> ------------------------------
>
> *From: *"vivek pandya" <vivekvpandya at gmail.com>
> *To: *"Mehdi Amini" <mehdi.amini at apple.com>
> *Cc: *"Hal Finkel" <hfinkel at anl.gov>, "Quentin Colombet" <
> qcolombet at
2016 May 24
2
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
Hello,
I have written following code to check each register if it is used by
machineFunction or not :
MachineRegisterInfo *MRI = &MF.getRegInfo();
TargetRegisterInfo *TRI = (TargetRegisterInfo
*)MF.getSubtarget().getRegisterInfo();
const TargetMachine &TM = MF.getTarget();
const MCRegisterInfo *MCRI = TM.getMCRegisterInfo();
DEBUG(dbgs() << "Function Name : " <<
2016 May 11
4
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
> On May 10, 2016, at 6:06 PM, Hal Finkel <hfinkel at anl.gov> wrote:
>
>
>
> From: "vivek pandya" <vivekvpandya at gmail.com>
> To: "llvm-dev" <llvm-dev at lists.llvm.org>, "Tim Amini Golling" <mehdi.amini at apple.com>, "Hal Finkel" <hfinkel at anl.gov>
> Cc: "Quentin Colombet" <qcolombet
2016 May 15
2
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
> On May 15, 2016, at 12:43 AM, vivek pandya <vivekvpandya at gmail.com> wrote:
>
>
>
> Vivek Pandya
>
>
> On Wed, May 11, 2016 at 9:43 AM, Mehdi Amini <mehdi.amini at apple.com <mailto:mehdi.amini at apple.com>> wrote:
>
>> On May 10, 2016, at 6:06 PM, Hal Finkel <hfinkel at anl.gov <mailto:hfinkel at anl.gov>> wrote:
>>
2016 May 25
2
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
On Wed, May 25, 2016 at 3:53 AM, Hal Finkel <hfinkel at anl.gov> wrote:
>
> ------------------------------
>
> *From: *"vivek pandya" <vivekvpandya at gmail.com>
> *To: *"Quentin Colombet" <qcolombet at apple.com>
> *Cc: *"Hal Finkel" <hfinkel at anl.gov>, "llvm-dev" <llvm-dev at lists.llvm.org>,
>
2016 May 11
2
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
----- Original Message -----
> From: "vivek pandya" <vivekvpandya at gmail.com>
> To: "Matthias Braun" <matze at braunis.de>
> Cc: "Hal Finkel" <hfinkel at anl.gov>, "llvm-dev"
> <llvm-dev at lists.llvm.org>
> Sent: Wednesday, May 11, 2016 1:14:07 PM
> Subject: Re: [llvm-dev] [GSoC 2016] Interprocedural Register
2016 May 18
0
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
> On May 18, 2016, at 11:00 AM, vivek pandya <vivekvpandya at gmail.com> wrote:
>
>
>
> Vivek Pandya
>
>
> On Wed, May 18, 2016 at 11:25 PM, Quentin Colombet <qcolombet at apple.com <mailto:qcolombet at apple.com>> wrote:
>
>> On May 18, 2016, at 10:46 AM, vivek pandya <vivekvpandya at gmail.com <mailto:vivekvpandya at
2016 May 24
0
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
----- Original Message -----
> From: "vivek pandya" <vivekvpandya at gmail.com>
> To: "Quentin Colombet" <qcolombet at apple.com>
> Cc: "Hal Finkel" <hfinkel at anl.gov>, "llvm-dev"
> <llvm-dev at lists.llvm.org>, "Matthias Braun" <matze at braunis.de>,
> "Mehdi Amini" <mehdi.amini at
2016 May 25
2
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
On Wed, May 25, 2016 at 8:44 AM, Hal Finkel <hfinkel at anl.gov> wrote:
>
> ------------------------------
>
> *From: *"vivek pandya" <vivekvpandya at gmail.com>
> *To: *"Hal Finkel" <hfinkel at anl.gov>
> *Cc: *"llvm-dev" <llvm-dev at lists.llvm.org>, "Matthias Braun" <
> matze at braunis.de>, "Mehdi
2016 May 11
3
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
Yes there is also MachineRegisterInfo::UsedPhysRegMask which should be the union of all regmasks in the function.
> On May 11, 2016, at 10:47 AM, Hal Finkel via llvm-dev <llvm-dev at lists.llvm.org> wrote:
>
>
>
> From: "Matthias Braun" <matze at braunis.de>
> To: "Hal Finkel" <hfinkel at anl.gov>
> Cc: "vivek pandya"
2016 May 25
0
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
----- Original Message -----
> From: "vivek pandya" <vivekvpandya at gmail.com>
> To: "Hal Finkel" <hfinkel at anl.gov>
> Cc: "llvm-dev" <llvm-dev at lists.llvm.org>, "Matthias Braun"
> <matze at braunis.de>, "Mehdi Amini" <mehdi.amini at apple.com>, "Quentin
> Colombet" <qcolombet at
2016 May 25
3
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
> On May 24, 2016, at 10:08 PM, vivek pandya <vivekvpandya at gmail.com> wrote:
>
>
>
> On Wed, May 25, 2016 at 10:08 AM, Mehdi Amini <mehdi.amini at apple.com <mailto:mehdi.amini at apple.com>> wrote:
>
>> On May 24, 2016, at 9:17 PM, vivek pandya <vivekvpandya at gmail.com <mailto:vivekvpandya at gmail.com>> wrote:
>>
>> Dear
2016 May 11
2
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
> On May 11, 2016, at 3:31 AM, Hal Finkel via llvm-dev <llvm-dev at lists.llvm.org> wrote:
>
>
> From: "vivek pandya" <vivekvpandya at gmail.com>
> To: "Mehdi Amini" <mehdi.amini at apple.com>
> Cc: "Hal Finkel" <hfinkel at anl.gov>, "Quentin Colombet" <qcolombet at apple.com>, "llvm-dev"
2016 May 25
2
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
> On May 24, 2016, at 9:17 PM, vivek pandya <vivekvpandya at gmail.com> wrote:
>
> Dear Mentors,
>
> Please help me to understand our plan to implement Interprocedural Register allocator by propogating register usage info. While writing this mail I am considering all previous discussion over llvm-dev and IRC.
>
> 1) A MachineFunction pass to be executed POST-RA to
2016 May 25
2
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
Sent from my iPhone
> On May 24, 2016, at 11:04 PM, vivek pandya <vivekvpandya at gmail.com> wrote:
>
>
>
>> On Wed, May 25, 2016 at 10:46 AM, Mehdi Amini <mehdi.amini at apple.com> wrote:
>>
>>> On May 24, 2016, at 10:08 PM, vivek pandya <vivekvpandya at gmail.com> wrote:
>>>
>>>
>>>
>>> On Wed, May 25,