similar to: clang triple and clang target

> > I assume with target you mean the backend? Consider the x86 backend. It > supports 32bit and 64bit mode, with the GNU x32 ABI in between. There > are three different executable formats support (ELF, PE, MachO) with > different constraints. Some platforms require 32bit alignment of the > stack, others require 128bit alignment. The list goes on. The triple > specifies >

On Sat, Mar 12, 2016 at 2:38 PM, Tim Northover <t.p.northover at gmail.com> wrote: > On 12 March 2016 at 11:51, Rail Shafigulin via llvm-dev > <llvm-dev at lists.llvm.org> wrote: > > I tried every possible combination of --target I could think of but > nothing > > worked. Would you mind helping me out? > > First, 64-bit x86 is "x86_64", and 32-bit

My question is: How do I make clang to generate assembly with vector instruction for my target? The back story is: I've added a few vector instructions to my target and confirmed that they are used by running my code on the test below and using a following command: opt i.esencia.ll -S -march=esencia -mcpu=esencia -loop-vectorize | llc -mcpu=esencia -o i.esencia.s target datalayout =

I'm trying to vectorize a simple C code. My problem is that I don't quite understand the relationship between clang --target option and the cores mentioned in X86.td as well as other X86 related options (such as -mtune). Below are the command and the code that I'm trying to vectorize. The code compiles but I don't see any vectors. What am I doing wrong? Any help is appreciated.

Hi there, I am Software product developer at Robert Bosch, Germany. We are using armv8 64bit targets for our development. We have the need to do the cross compiling for our target on windows. I have compiled clang 5.0 from the vcs git. I have tried compiling the code with following options set: clang.exe -target armv8 -fslp-vectorize-aggressive -mfpu=neon -mfloat-abi=hard -c test.cpp As you

Hi, here's the canonical helloworld.c #include<stdio.h> int main() { printf("Hello World"); return 0; } In accordance with the cross-compilation LLVM documentation [1], I am trying to target the ARM on the Zedboard [2]. It is an ARM Cortex-A9. The machine I am compiling on is an x86_64 Fedora Linux machine, using clang 3.3. I am failing to generate an executable,

On 25 March 2016 at 04:11, Hal Finkel <hfinkel at anl.gov> wrote: > As I understand it, the fundamental property being addresses here is: Are the semantics of scalar FP math the same as vector FP math? TTI seems like a good place to expose that information. If the semantics are indeed different, then the vectorizer would require fast-math flags in order to vectorize FP operations

On Fri, Mar 25, 2016 at 01:23:03PM +0000, Renato Golin via llvm-dev wrote: > On 25 March 2016 at 04:11, Hal Finkel <hfinkel at anl.gov> wrote: > > As I understand it, the fundamental property being addresses here is: Are > > the semantics of scalar FP math the same as vector FP math? TTI seems like > > a good place to expose that information. If the semantics are indeed

Hi all, LLVM CodeGen and Tools team at Apple is looking for exceptional compiler engineers. This is a great opportunity to work with many of the leaders in the LLVM community. If you are interested in this position, please send your resume / CV and relevant information to evan.cheng at apple.com Thanks, Evan Job description The Apple compiler team is seeking an engineer who is strongly

On 26 November 2013 15:36, Rob Stewart <robstewart57 at gmail.com> wrote: > $ clang -v -target armv7a-linux-eabi -mcpu=cortex-a9 -mfloat-abi=soft > -mfpu=neon helloworld.c > Hi Rod, You need cross-binutils installed on your box. If you use Debian, there are packages (gcc-4.7-arm-linux-gnueabi and friends). Other distros may have similar packages, but you can always download the

Dear LLVM developers, Hello, I'm trying to find a way of cross-compiling my c code against Baremetal Cortex-M device (so target triple will be arm-none-eabi) only using LLVM/Clang, and not using anything from GNU (ld or libc). I'm doing this to know which one of LLVM/clang and GCC produces smaller flash image size because saving flash is a big deal in our projects. 1) When I just follow

2) For lag in execution time due to floating point operations, it was clearly observed that gcc used floating point instruction FSQRT, where as clang seemed to use emulated function (?) BL SQRT. Note that we used the following flags for both clang as well as gcc compilation. -march=armv7-a -mfloat-abi=softfp -mfpu=vfpv3-d16 -mtune=cortex-a8 Infact, i was surprised to see that even when

Hi All, Could anyone point me to some good benchmarking tools to measure the runtime performance of clang compiled C++ applications. Thanks ! - Jyoti -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20131003/3cc029f1/attachment.html>

Hello All, I am building llvm-clang tool chain for *arm target* by following the steps from http://clang.llvm.org/docs/CrossCompilation.html *However when I tried following cmake command for build tool chain it gives the error message :* #CC='clang' CXX='clang++' cmake -G Ninja /home/iiita/llvm-exp/llvm -DCMAKE_CROSSCOMPILING=True

Hi Kun Ling & Bergstrom, Thanks a lot for your earlier responses. We did use the benchmarks in llvm testsuite for comparing execution time taken by clang & gcc. It appears that clang is slower than gcc for cases where floating point operations are involved and recursive calls are involved (note that pic/pie was enabled for both gcc as well as clang ). 1) For lag in execution time due to

What would be the proper clang (3.2) options to generate ARM for Raspberry pi for LLVM 3.2 with clang 3.2? I realized that "-ccc-host-triple" is no longer valid option in clang. p.s. I googled and found the following which doesn't work with clang 3.2. To cross-compile for Raspberry Pi add flags -ccc-host-triple arm-eabi -marm -mfpu=vfp -mcpu=arm1176jzf-s -mtune=arm1176jzf-s

My target has an instruction that adds up all elements in the vector and stores the result in a register. I'm trying to implement it in my compiler but I'm not sure even where to start. I did look at other targets, but they don't seem to have anything like it ( I could be wrong. My experience with LLVM is limited, so if I missed it, I'd appreciate if someone could point it out ).

Hi Rail, Below 2 revisions might be of your interest which Detect SAD patterns and emit psadbw instructions on X86.: http://reviews.llvm.org/D14840 http://reviews.llvm.org/D14897 Intrinsics related to absdiff revisons : http://reviews.llvm.org/D10867 http://reviews.llvm.org/D11678 Hope this helps. Regards, Suyog On Sat, May 28, 2016 at 4:20 AM, Rail Shafigulin via llvm-dev < llvm-dev at

On Thu, Jan 28, 2016 at 8:34 PM, Dylan McKay <dylanmckay34 at gmail.com> wrote: > Try visualising the DAG like this. > > ``` > ---- GPR:$rA > / > set GPR:$rd ---- add > \ > ---- GPR:$rB > ``` > > Each instruction forms a DAG with its operands being subnodes. > >

> On Feb 1, 2016, at 16:53, Rail Shafigulin <rail at esenciatech.com> wrote: > > > > On Fri, Jan 29, 2016 at 10:03 PM, Matt Arsenault <arsenm2 at gmail.com <mailto:arsenm2 at gmail.com>> wrote: > > > On Jan 29, 2016, at 13:25, Rail Shafigulin via llvm-dev <llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org>> wrote: > > >