similar to: virtual registers

Yes, I have done exactly the same. The wawanalyzer is the same. I changed ARM.h and ARMTargetMachine.cpp in the tager/arm folder. then I make tool/llc and lib folder. On Tue, Nov 17, 2015 at 10:55 AM, John Criswell <jtcriswel at gmail.com> wrote: > On 11/17/15 12:16 AM, fateme Hoseini via llvm-dev wrote: > > Hi, > So, I run my pass in X86 target with llc command and it printed

Dear John, Thank you so much for your help. I looked at those documents. Could you kindly answer the following questions: Does it mean that I have to make my own backend target in order to write a machine pass even if I want to run a simple machinefunction pass? for example,if I want my pass to get MIPS instructions as an input, I have to copy all the files from mips target and add a file to it

Hi, So, I run my pass in X86 target with llc command and it printed out "hello****". Now I am trying to do the same pass for ARM target. So I did exactly what I did for X86 as mentioned in my previous posts. When I run the following command: llc -march=arm test.ll -o test nothing prints out. I did the same for MIPS target too and I got no result. Can anyone tell me what I'm doing

Hi everyone, I am a LLVM newbie. I need to write a machinefunction pass for my project. This should be an analyzer of the machine code to do some profiling. I have written a couple of function passes for front end, but it seems they are completely different. I searched through forum and llvm documents, but couldn't find anything useful or questions were unanswered. Can anyone reference me to

Thank you so much. That helped alot. Fami On Wed, Nov 4, 2015 at 9:40 AM, John Criswell <jtcriswel at gmail.com> wrote: > On 11/3/15 7:54 PM, fateme Hoseini wrote: > > Dear John, > Thank you so much for your help. I looked at those documents. Could you > kindly answer the following questions: > > Does it mean that I have to make my own backend target in order to write

Hi All, I wanted to collect the register usage stats for the program assigned by compiler(in other words "how many time each register will be accessed by the program when it will execute"). How to write LLVM pass which will analyse the code after LLVM global register allocation pass and output the stats. Regards, -Bala -- Thanks, Bala IIITA Allahabad -------------- next part

Hello, I am writing a MachineFunctionPass that inspects the generated machine code, and examines each opcode and its corresponding operands. If the 'instruction + operands' match a particular sequence, then the pass should replace them with a fixed instruction + operands sequence. I tried using MachineInstr's getOpcode and getOperand functions but the pass didn't work as expected.

Hello all, I need to modify llvm bytecode / native code just before it is emitted i.e. after all the regular operations and optimizations are done. I was told that this can be achieved by implementing a MachineFunctionPass. I searched the internet for some tutorials or some example MachineFunctionPass but found nothing. Kindly point some links, or anything that may help. Thank you. Regards,

Hi, all Is there a way of getting the basic block offset from its parent function ? What I'm trying to do is to get an execution count of each basic blocks, so I need to know the starting address of each basic blocks. Obviously we can't get the absolute address before linking the program, but the offset relative to parent function should be available so I can take it and get the function

Dear All, Is there a way in newer versions of LLVM (4.0 and higher) to find the size of an x86 instruction within a MachineFunctionPass?  If not, is there something I can do in the MC layer to do this? I'm trying to modify LLVM to implement something like Native Client in which groups of instructions are aligned at a specific alignment and have the same length.  My current approach is to

The actual size of even a MC instruction will change during relaxation--we don't choose between 8-bit jumps and wider jumps until relaxation. You can get the actual encoding of an MCInst via MCCodeEmitter, but if you expect relaxation to occur, or particularly if you're testing before register allocation, the size could only be an estimate and shouldn't be trusted for exact size.

Hello, I want learn more about register allocation and do some analysis for a current research project. After reading some papers (eg. Chaitin, Briggs) I think its time to get my hands dirty :). First I plan to (re)implement some of the classic approaches to get familiar with the framework. At the beginning the following questions came up: - Is there some documentation about register allocation

Hi John Thanks for your suggestions, they all sound reasonable to me. The way I'm thinking right now is to write a MachineFuncionPass that iterate through each MachinBasicBlock, for each MBB, adds up the instructions counts of previous MBBs, that number multiply by 4 should be the offset of that MBB from its MachineFunction. In order to correctly count the instructions, this pass should be

On 3/18/16 12:33 PM, Quentin Colombet via llvm-dev wrote: > Hi Vivek, > >> On Mar 16, 2016, at 1:00 PM, vivek pandya via llvm-dev >> <llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org>> wrote: >> >> Hello, >> >> Probably this may be too late to start thinking about this project >> but I think this is particularly useful

> On Jul 2, 2015, at 2:05 PM, Jim Grosbach <grosbach at apple.com> wrote: > >> >> On Jul 2, 2015, at 1:17 PM, Ethan J. Johnson <ejohns48 at cs.rochester.edu <mailto:ejohns48 at cs.rochester.edu>> wrote: >> >> Hi all, >> >> I am working on creating a MachineFunctionPass to perform an analysis on X86 code. After a bit of trouble, I was

Hi everyone, I have a data frame that looks *sort of* like this: name <- letters[1:5] signal.1 <- c("12", "bad signal", "noise", "10", "X") length.signal.1 <- 5:9 intensity.signal.1 <- 3:7 signal.2 <- c("13", "noise", "19.2", "X", "V") length.signal.2 <- 2:6 intensity.signal.2

David Greene wrote: > On Saturday 01 May 2010 08:34:50 Josef Eisl wrote: >> Hello, >> >> I want learn more about register allocation and do some analysis for a >> current research project. After reading some papers (eg. Chaitin, >> Briggs) I think its time to get my hands dirty :). > > Welcome! > >> First I plan to (re)implement some of the classic

Hi all, I am working on creating a MachineFunctionPass to perform an analysis on X86 code. After a bit of trouble, I was able to get my pass compiling and running correctly in llc. However, since a machine pass is compiled directly into the code generator, rerunning "make" across the LLVM build tree involves re-linking most of the major libraries and executables. This is a rather

On 2/27/15 6:30 PM, Ziqiang Patrick Huang wrote: > Hi, all > > Is there a way of getting the basic block offset from its parent > function ? At the LLVM IR level, no. At the code generator layer (MachineFunctionPass layer or the MC layer), probably yes. > > What I'm trying to do is to get an execution count of each basic > blocks, so I need to know the starting

On Saturday 01 May 2010 08:34:50 Josef Eisl wrote: > Hello, > > I want learn more about register allocation and do some analysis for a > current research project. After reading some papers (eg. Chaitin, > Briggs) I think its time to get my hands dirty :). Welcome! > First I plan to (re)implement some of the classic approaches to get > familiar with the framework. Before