similar to: Skip redundant checks in AliasSet::aliasesUnknownInst

Thank you for the idea! Could you please explain it? If I’m not mistaken, you advise to insert the unknown insts of an every AS from AliasSetTracker::add(const AliasSetTracker &AST) into a smallptrset and consequently append it to merged alias sets from AliasSetTracker::findAliasSetForUnknownInst. I think that Philip proposed something similar to your approach in

On 01/27/2016 07:53 AM, Daniel Berlin wrote: > > > On Wed, Jan 27, 2016 at 1:27 AM, Roman Gareev <gareevroman at gmail.com > <mailto:gareevroman at gmail.com>> wrote: > > Thank you for the idea! Could you please explain it? > > > Which part are you having trouble with, so i know where to concetrate? > > If I’m not > mistaken, you advise

2015-12-11 23:44 GMT+05:00 Hal Finkel <hfinkel at anl.gov>: > Hi Roman, > > The MemoryLocation objects are involved in findAliasSetForUnknownInst, but none are created there for the memset intrinsic. MemoryLocation objects are only involved for the regular memory accesses being compared to the unknown instruction. See AliasSet::aliasesUnknownInst in lib/Analysis/AliasSetTracker.cpp.

Dear llvm contributors, Could you please advise me where objects of MemoryLocation class are created for ‘llvm.memset.*‘ intrinsics? In the Bug 23077 (https://llvm.org/bugs/show_bug.cgi?id=23077) the AliasSetTracker constructs 128 alias sets for 0 pointer values, which contain only unknown instructions. In this case, all unknown instructions, which are added to new alias sets in the

Hi all, There is a problem about how AliasSetTracker merging AliasSet's when meet UnknownInst. When adding new pointer it looks for existing AliasSet's aliased with new pointer. And merging them together. It is ok for pointers: if %A mayalias %B and %B mayalias %C then %A mayalias %C. But the same logic when adding callsite is wrong ( findAliasSetForUnknownInst). Callsite may be known

Dear LLVM contributors, I work on the "Improvement of vectorization process in Polly". At the moment I'm trying to implement tiling, interchanging and unrolling of specific loops based on the following algorithm for the analytical modeling [1]. It requires information about the following parameters of a target architecture: 1. Size of double-precision floating-point number. 2.

Hi again! Replying in chronological order: > On Thu, Jul 9, 2020 at 6:51 PM Shuai Wang <wangshuai901 at gmail.com > <mailto:wangshuai901 at gmail.com>> wrote: > > Hey Matt, > > That's awesome. Thank you very much for all the information and > clarification! Just a few follow up questions. Could you kindly shed > some lights on it? Thank

Hi Tobias, I think that we could split a patch that contains an implementation of tiling, interchanging and unrolling of specific loops into three separate patches: 1. The first one adds a class that describes a processor model. It also adds a new command line parameter that contains all necessary parameters of a target architecture, which are used to construct objects of the class. 2. The

2016-06-27 15:52 GMT+05:00 4lbert C0hen <4lbert.h.c0hen at gmail.com>: > Dear Roman and all, > > Such features would be extremely useful to implement array expansion (scalar > and array renaming, privatization with new subscript expressions of higher > dimension) and storage mapping optimization (generalizing array > contraction). It would be interesting to have these

On 05/17/2016 01:47 PM, Michael Kruse wrote: > 2016-05-16 19:52 GMT+02:00 Roman Gareev <gareevroman at gmail.com>: >> Hi Tobias, >> >> could we use information about memory accesses of a SCoP statement and >> def-use chains to determine statements, which don’t contain matrix >> multiplication of the following form? > > Assuming s/don't/do you want

Sorry for not responding earlier. On 05/20/2016 03:05 PM, Roman Gareev wrote: > Thank you very much for the advices! I could probably try to avoid > using of nonhardware prefetching in the project, if Tobias doesn’t > disagree with it. My understanding is that prefetching isn’t used > explicitly in [1] and, according to [2], in some cases 90% of the > turbo boost peak of the

On 06/28/2016 10:53 AM, Roman Gareev wrote: > 2016-06-27 15:52 GMT+05:00 4lbert C0hen <4lbert.h.c0hen at gmail.com>: >> Dear Roman and all, >> >> Such features would be extremely useful to implement array expansion (scalar >> and array renaming, privatization with new subscript expressions of higher >> dimension) and storage mapping optimization (generalizing

Dear community, the next step of the "Improvement of vectorization process in Polly" project is to implement the packing transformation described in http://www.cs.utexas.edu/users/flame/pubs/TOMS-BLIS-Analytical.pdf. I had a discussion with Tobias and we decided that a packing transformation is in many ways a data-layout transformation that will require to introduce a new array, copy

Hi Tobias, could we use information about memory accesses of a SCoP statement and def-use chains to determine statements, which don’t contain matrix multiplication of the following form? for (int i = 0; i < Upper Bound1; i++) for (int j = 0; j < Upper Bound2; j++) for (int k = 0; k < Upper Bound3; j++) C[i][j] += A[i][k] * B[k][j] We could probably check that memory access

Hey Matt, That's awesome. Thank you very much for all the information and clarification! Just a few follow up questions. Could you kindly shed some lights on it? Thank you! 1. I tried to tweak the code in the following way: - Clang [-> LLVM-IR]: https://llvm.godbolt.org/z/n9rGrs - [LLVM-IR ->] opt: https://llvm.godbolt.org/z/Uc6h5Y And i note that the outputs are: Alias sets for

2016-05-19 21:45 GMT+05:00 4lbert C0hen <4lbert.h.c0hen at gmail.com>: > One short note. I would advise against spending time on prefetching for x86. > Recent hardware prefetchers are amazingly good at strided accesses in > single-threaded code. Caution: this is not based on objective/published > data, but on personal experience. > > There are open challenges in

Hi Tobias, according to [1], we can expect 90% of the turbo boost peak of the processor with a C version of Matrix-Matrix Multiplication that is similar to the one presented in [1]. In case of Intel Core i7-3820 SandyBridge, the theoretical maximal performance of the machine is 28.8 gflops and hence the expected number is 25,92 gflops. However, in case of, for example, n = m = 1056 and k = 1024

Hi! On 7/10/2020 07:17, Shuai Wang wrote: > Hello! > > Thank you very much! Yes, that makes a lot of sense to me. However, just > want to point out two things that are still unclear: > > 1. The output contains a alias set of only one element, for instance: > "must alias, Mod       Pointers: (i32* %y, LocationSize::precise(4))" > > This one really confused

>>>> Maybe it could be a temporary solution. I think that if the checks are >>>> successfully passed and the basic block of the statement has exactly >>>> 14 instructions, the statement contains matrix multiplication and can >>>> be safely optimized with a generation of specific code, which takes >>>> into account information about usage

Hi, I wanted to give a heads-up that I've been looking into replacing the AliasSetTracker(AST) with MemorySSA in the Loop Invariant Code Motion (LICM) pass. I would love to get feedback on the best way to incrementally push in this change. Motivation: There has been an outstanding issue with using the Alias Set Tracker due to its expensive construction time (quadratic). We've had test