Displaying 20 results from an estimated 1000 matches similar to: "Attribute for a invariant function ?"
2018 Sep 11
2
Byte-wide stores aren't coalesced if interspersed with other stores
Andres:
FWIW, codegen will do the merge if you turn on global alias analysis for it
"-combiner-global-alias-analysis". That said, we should be able to do this
merging earlier.
-Nirav
On Mon, Sep 10, 2018 at 8:33 PM, Andres Freund via llvm-dev <
llvm-dev at lists.llvm.org> wrote:
> Hi,
>
> On 2018-09-10 13:42:21 -0700, Andres Freund wrote:
> > I have, in postres,
2012 May 04
4
Git branch with compiling fixes for win32
El 03/05/12 12:19, Miroslav Lichvar escribi?:
> It makes the C function faster than the corresponding asm routine, so
> if it's included I'd suggest to just drop the asm function to not keep
> around more asm code than is necessary.
With current compilers it is very likely that those routines are already
superflous.
2004 Aug 06
2
commas are status2.xsl?
in the status2.xsl there seems to be some extra commas ...
--snippet of status2.xsl
Global,Client:<xsl:value-of select="connections" /> Source:
<xsl:value-of select="source_connections" />,,<xsl:value-of
select="listeners" />,,
<xsl:for-each select="source">
<xsl:value-of select="@mount" />,,<xsl:value-of
2017 Oct 31
2
Status of llvm.invariant.{start|end}
> We at Azul have been using invariant.start for marking objects as immutable after a certain point.
> Also, upstream changes to teach relevant optimizations about invariant.start and end were added
> last year.
>
> With respect to store to load forwarding, this is handled in GVN. I think the test cases in test/Transforms/GVN/invariant.start.ll
> handle what you’re looking for.
2006 Oct 10
2
Ferret returning too many results
Hi, I just upgraded from acts_as_ferret 0.2/Ferret 0.9.x to
acts_as_ferret 0.3/ferret .10.9, and i''m getting a strange behavior:
searches are returning far too many results, most of them superflous.
i''ll paste in my code below, it''s pretty simple. i''m googling like mad,
and going through both the source and the forums, and having trouble
finding what could
2012 Jan 05
1
x11 header check still needed?
Hi,
is the x11 header check in tools/check/ still needed?
On NetBSD it is superflous and can be removed.
Christoph
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2016 Aug 30
2
[PATCH v8 15/18] ARM: STi: DT: STiH407: Add uniperif reader dt nodes
On Fri, 26 Aug 2016, Peter Griffin wrote:
> This patch adds the DT node for the uniperif reader
> IP block found on STiH407 family silicon.
>
> Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen at st.com>
> Signed-off-by: Peter Griffin <peter.griffin at linaro.org>
> ---
> arch/arm/boot/dts/stih407-family.dtsi | 26 ++++++++++++++++++++++++++
> 1 file
2016 Aug 30
2
[PATCH v8 15/18] ARM: STi: DT: STiH407: Add uniperif reader dt nodes
On Fri, 26 Aug 2016, Peter Griffin wrote:
> This patch adds the DT node for the uniperif reader
> IP block found on STiH407 family silicon.
>
> Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen at st.com>
> Signed-off-by: Peter Griffin <peter.griffin at linaro.org>
> ---
> arch/arm/boot/dts/stih407-family.dtsi | 26 ++++++++++++++++++++++++++
> 1 file
2017 Jan 20
2
[RFC] IR-level Region Annotations
On 01/11, Daniel Berlin via llvm-dev wrote:
> >
> > def int_experimental_directive : Intrinsic<[], [llvm_metadata_ty],
> > [IntrArgMemOnly],
> > "llvm.experimental.directive">;
> >
> > def int_experimental_dir_qual : Intrinsic<[], [llvm_metadata_ty],
> > [IntrArgMemOnly],
> >
2013 Mar 30
1
Missing connection
Hi,
I've set up Tinc in switch-mode on the three nodes "gw", "rb493g" and
"v900w", but the nodes "rb493g" and "w900v" do not connect to each
other.
On each node port 655 is opened with TCP and UDP.
"gw": static IPv4- and IPv6 address listed in the hosts-file "gw"
hosts-files: "gw",
2017 Oct 30
2
Status of llvm.invariant.{start|end}
Hi,
>From LangRef, these intrinsics seems really useful for letting LLVM
know about certain higher level immutability guarantee, e.g. for
objects that are not allowed to be mutated after construction.
However, it doesn't seem to work[1] and a quick code search suggests
that there's not a single optimization pass that's currently using it
for store to load forwarding, only very few
2013 Jun 07
2
[LLVMdev] add Inline assembly in LLVM IR
Hi all,
I'm working for translating dex bytecode to LLVM IR
In order to communicate with Android interpreter,
The work have to add data below some instructions
I want to use inline assembly to add data.
Thus, I wrote a little program to find out the related LLVM IR
int main()
{
asm(".long 0x12345678");
return 0;
}
and I use clang to translate it into bitcode
It's the
2020 Apr 22
1
[PATCH hmm 2/5] mm/hmm: make hmm_range_fault return 0 or -1
On Tue, Apr 21, 2020 at 09:21:43PM -0300, Jason Gunthorpe wrote:
> From: Jason Gunthorpe <jgg at mellanox.com>
>
> hmm_vma_walk->last is supposed to be updated after every write to the
> pfns, so that it can be returned by hmm_range_fault(). However, this is
> not done consistently. Fortunately nothing checks the return code of
> hmm_range_fault() for anything other
2017 Oct 31
2
Status of llvm.invariant.{start|end}
On Oct 31, 2017, at 3:50 PM, Anna Thomas via llvm-dev <llvm-dev at lists.llvm.org<mailto:llvm-dev at lists.llvm.org>> wrote:
On Oct 31, 2017, at 12:17 PM, Yichao Yu <yyc1992 at gmail.com<mailto:yyc1992 at gmail.com>> wrote:
We at Azul have been using invariant.start for marking objects as immutable after a certain point.
Also, upstream changes to teach relevant
2018 Sep 05
3
How to get return address at llvm ir level?
Hi
I want to write a FunctionPass to insert some code before return.
Funcion:
..
..
..
mov eax,[esp]
cmp eax,0x12345678
je 0x12345678
ret
(maybe stack will not balance)
I wonder that can I get the return address at llvm ir level?
I use IRBuilder to CreateICmpEQ and CreateCondBr.
but I don't how to get the value of return addrss.
I have found there is a Intrinsic::returnaddress.
Is
2005 Sep 19
0
[LLVMdev] LLVM-TV web page link is broken?
On Mon, 19 Sep 2005, Brian R. Gaeke wrote:
> Sorry, I don't personally have any of that stuff anymore -- I seem
> to recall that page didn't have a whole lot on it, though. I think
> Misha has messed around with llvm-tv more recently than I have. If
> you really want that particular page, it looks like you can get (a
> version of) it from the Internet Archive...
>
>
2018 Sep 10
2
Byte-wide stores aren't coalesced if interspersed with other stores
Hi,
I have, in postres, a piece of IR that, after inlining and constant
propagation boils (when cooked on really high heat) down to (also
attached for your convenience):
source_filename = "pg"
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-linux-gnu"
define void @evalexpr_0_0(i8* align 8 noalias, i32* align 8 noalias) {
2015 Aug 31
2
alloca combining, not (yet) possible ?
Hello
since my broad RFC request didn't catch any responses, let me get a bit
more into the nitty-gritty:
I tried to get llvm (3.7) to optimize superflous allocas away, but so
far I haven't figured out how. Is there no optimizer for this ? Should I
adorn something with some attributes ? As far as I can tell no, but I am
no llvm expert...
For what I want to do, i will probably have a
2008 Apr 11
1
base64 ALBUMART vorbiscomment (was Re: [ogg-dev] Ogg/Spots and Ogg/MNG)
[Cc: changed to vorbis-dev]
On 12/04/2008, Ivo Emanuel Gon?alves <justivo at gmail.com> wrote:
> On Fri, Apr 11, 2008 at 10:11 PM, Conrad Parker <conrad at metadecks.org> wrote:
> > No, vorbiscomments are meant to be human-readable.
>
>
> But I CAN read base64!
:-)
> It's a win-win situation, with the added bonus that it wouldn't
> require
2005 Sep 19
2
[LLVMdev] LLVM-TV web page link is broken?
Sorry, I don't personally have any of that stuff anymore -- I seem
to recall that page didn't have a whole lot on it, though. I think
Misha has messed around with llvm-tv more recently than I have. If
you really want that particular page, it looks like you can get (a
version of) it from the Internet Archive...
http://web.archive.org/web/20041102220954/llvm.cs.uiuc.edu/~gaeke/llvm-tv/