Displaying 20 results from an estimated 7000 matches similar to: "persuading licm to do the right thing"
2015 Dec 09
2
persuading licm to do the right thing
On some targets with limited addressing modes,
getting that 64-bit relocatable but loop-invariant value into a register
requires several instructions. I'd like those several instruction outside
the loop, where they belong.
Yes, my experience is that something (I assume instcombine) recanonicalizes.
Thanks,
Preston
On Tue, Dec 8, 2015 at 11:21 PM, Mehdi Amini <mehdi.amini at
2015 Dec 09
2
persuading licm to do the right thing
I'm trying to make the IR "better", in a machine-independent fashion,
without having to do any lowering.
I've written code that rewrites GEPs as simple adds and multiplies,
which helps a lot, but there's still some sort of re-canonicalization
that's getting in my way. Is there perhaps a way to suppress it?
Thanks,
Preston
On Wed, Dec 9, 2015 at 7:47 AM, Mehdi Amini
2015 Dec 09
2
persuading licm to do the right thing
I suppose your view is reasonable, and perhaps common.
My own "taste" has always preferred machine-independent code
that is as simple as possible, so GEPs reduced to nothing more than an
add, etc, i.e., quite risc-like. Then optimize it to reduce the total number
of operations (as best we can), then raise the level during instruction
selection, taking advantage of available instructions.
2015 Dec 09
3
persuading licm to do the right thing
A GEP can represent a potentially large tree of instructions.
Seems like all the sub-trees are hidden from optimization;
that is, I never see licm or value numbering doing anything with them.
If I rewrite the GEPs as lots of little adds and multiplies,
then opt will do a better job (I speculate this happens during lowering).
One of the computations that's hidden in the GEP in my example
is
2015 Dec 09
3
persuading licm to do the right thing
I understand that GEPs do not access memory.
They do a (possibly expensive) address calculation,
perhaps adding a few values to a label and leaving the result in a register.
Getting a label into a register is (to me) just like loading a 64-bit
integer value
into a register. It can happen in many places and it can cost a few
instructions
and several bytes. I'd like to see such things commoned
2015 Apr 25
3
[LLVMdev] alias analysis on llvm internal globals
Hi
I have this program in which fooBuf can only take on NULL or the
address of local_fooBuf, and fooBuf and local_fooBuf have scope of the
foo function.
Therefore there is no way for the fooPtr argument to alias with
fooBuf. However, LLVM basicaa and globalsmodref-aa say the 2 pointers
may alias.
I am thinking whether i should implement a limited form of point-to
alias on the fooBuf pointer in
2016 Feb 11
3
Expected constant simplification not happening
Hi
the appended IR code does not optimize to my liking :)
this is the interesting part in x86_64, that got produced via clang -Os:
---
movq -16(%r12), %rax
movl -4(%rax), %ecx
andl $2298949, %ecx ## imm = 0x231445
cmpq $2298949, (%rax,%rcx) ## imm = 0x231445
leaq 8(%rax,%rcx), %rax
cmovneq %r15, %rax
movl $2298949, %esi ## imm = 0x231445
movq %r12, %rdi
movq %r14,
2016 Dec 07
1
Expected constant simplification not happening
Hello
Has there been any progress on this topic ? The 3.9 optimizer output is
still the same as I just looked.
https://llvm.org/bugs/show_bug.cgi?id=24448
Ciao
Nat!
Sanjay Patel schrieb:
> [cc'ing Zia]
>
> We have this transform with -Os for some cases after:
> http://reviews.llvm.org/rL244601
> http://reviews.llvm.org/D11363
>
> but something in this example is
2019 Aug 26
2
SCEV related question
Here is original C code:
void topup(int a[], unsigned long i) {
for (; i < 16; i++) {
a[i] = 1;
}
}
Here is the IR before the pass where I expect SCEV to return trip-count
value
; Function Attrs: nofree norecurse nounwind uwtable writeonly
define dso_local void @topup(i32* nocapture %a, i64 %i) local_unnamed_addr
#0 {
entry:
%cmp3 = icmp ult i64 %i, 16
br i1
2015 Jul 16
4
[LLVMdev] Improving loop vectorizer support for loops with a volatile iteration variable
----- Original Message -----
> From: "Hal Finkel" <hfinkel at anl.gov>
> To: "Chandler Carruth" <chandlerc at google.com>
> Cc: llvmdev at cs.uiuc.edu
> Sent: Thursday, July 16, 2015 1:58:02 AM
> Subject: Re: [LLVMdev] Improving loop vectorizer support for loops
> with a volatile iteration variable
> ----- Original Message -----
> >
2015 Aug 13
2
[LLVMdev] Improving loop vectorizer support for loops with a volatile iteration variable
Hi Gerolf,
I think we have several (perhaps separable) issues here:
1. Do we have a canonical form for loops, preserved through the optimizer, that allows naturally-constructed loop nests to remain separable?
2. Do we forbid non-lowering transformations that turn vectorizable loops into non-vectorizable loops?
3. How do we detect cases where transformations cause a negative answer to either
2019 Aug 25
2
SCEV related question
Hello,
I am first time paying with SCEV codebase.
I am trying to find out why ScalarEvolution is not able to give correct
back edge taken count for an expression.
So in my case flow reaches to howFarToZero() and in that function, I have
following expressions as SCEV
Start = (15 + (-1 * %i) (which is set to Distance SCEV)
Step = 1
now, first of all, should I expect Start as ConstantSCEV (15)
2013 Aug 15
4
[LLVMdev] [Polly] Analysis of extra compile-time overhead for simple nested loops
Hi all,
I have investigated the 6X extra compile-time overhead when Polly compiles the simple nestedloop benchmark in LLVM-testsuite. (http://188.40.87.11:8000/db_default/v4/nts/31?compare_to=28&baseline=28). Preliminary results show that such compile-time overhead is resulted by the complicated polly-dependence analysis. However, the key seems to be the polly-prepare pass, which introduces
2013 Dec 31
4
[LLVMdev] [Patch][RFC] Change R600 data layout
Hi,
I've prepared patches for both LLVM and Clang to change the
datalayout for R600. This may seem like a bold move, but I think it is
warranted. R600/SI is a strange architecture in that it uses 64bit
pointers but does not support 64 bit arithmetic except for load/store
operations that roughly map onto getelementptr.
The current datalayout for r600 includes n32:64, which is odd
2015 Sep 03
2
[RFC] New pass: LoopExitValues
On Wed, Sep 2, 2015 at 5:36 AM, James Molloy <james at jamesmolloy.co.uk> wrote:
> Hi,
>
> Coremark really isn't a good enough test - have you run the LLVM test suite
> with this patch, and what were the performance differences?
For the test suite single source benches, the 235 tests improved
performance, 2 regressed and 705 were unchanged. That seems very
optimistic.
2012 Apr 23
0
[LLVMdev] SIV tests in LoopDependence Analysis, Sanjoy's patch
Hi,
When I write various test cases and explore how they're handled by the code
in LoopDependenceAnalysis::analysePair, I'm surprised. This loop collects
pairs of subscripts from the source and destination refs.
* // Collect GEP operand pairs (FIXME: use GetGEPOperands from BasicAA),
adding*
* // trailing zeroes to the smaller GEP, if needed.*
* GEPOpdsTy destOpds, srcOpds;*
*
2015 Jul 16
2
[LLVMdev] Improving loop vectorizer support for loops with a volatile iteration variable
----- Original Message -----
> From: "Chandler Carruth" <chandlerc at google.com>
> To: "Hal Finkel" <hfinkel at anl.gov>
> Cc: "Hyojin Sung" <hsung at us.ibm.com>, llvmdev at cs.uiuc.edu
> Sent: Thursday, July 16, 2015 1:06:03 AM
> Subject: Re: [LLVMdev] Improving loop vectorizer support for loops
> with a volatile iteration
2016 May 19
4
GEP index canonicalization
Hi,
InstCombine canonicalizes index operands (unless they are into struct
types) to pointer size. The comment says: "If we are using a wider
index than needed for this platform, shrink it to what we need. If
narrower, sign-extend it to what we need. This explicit cast can make
subsequent optimizations more obvious.".
For our architecture, the canonicalization is a bit
2015 Jul 16
2
[LLVMdev] Improving loop vectorizer support for loops with a volatile iteration variable
----- Original Message -----
> From: "Chandler Carruth" <chandlerc at google.com>
> To: "Hyojin Sung" <hsung at us.ibm.com>, llvmdev at cs.uiuc.edu
> Sent: Wednesday, July 15, 2015 7:34:54 PM
> Subject: Re: [LLVMdev] Improving loop vectorizer support for loops
> with a volatile iteration variable
> On Wed, Jul 15, 2015 at 12:55 PM Hyojin Sung
2017 Mar 31
2
Dereferenceable load semantics & LICM
On Fri, Mar 31, 2017 at 10:23 AM, Sanjoy Das <sanjoy at playingwithpointers.com
> wrote:
> Hi Piotr,
>
> On March 31, 2017 at 9:07:42 AM, Piotr Padlewski
> (piotr.padlewski at gmail.com) wrote:
> > Hi all,
> > I have a question about dereferenceable metadata on load instruction. I
> > have a patch (https://reviews.llvm.org/D31539) for LICM that hoists
>