similar to: Creating/Deleting a new instruction from LLVM IR

Displaying 20 results from an estimated 1000 matches similar to: "Creating/Deleting a new instruction from LLVM IR"

2019 Jul 12
2
[cfe-dev] ARM float16 intrinsic test
Hi, I do not get your result. Do I miss something? $COMP_ROOT/clang++ --target=arm-arm-eabihf -march=armv8.2a+fp16 arm.cpp -S -o - -O3 .text .syntax unified .eabi_attribute 67, "2.09" .eabi_attribute 6, 14 .eabi_attribute 7, 65 .eabi_attribute 8, 1 .eabi_attribute 9, 2 .fpu crypto-neon-fp-armv8 .eabi_attribute 12, 4
2019 Jul 12
2
[cfe-dev] ARM float16 intrinsic test
Dear list, git checkout llvmorg-8.0.0 -b llvm8.0 cmake -G "Unix Makefiles" ../llvm-project/llvm -DCMAKE_BUILD_TYPE=Debug -DLLVM_ENABLE_PROJECTS="clang;lld" -DLLVM_TARGETS_TO_BUILD="X86;NVPTX;AMDGPU;ARM;AArch64" [arm.cpp] #define vst4_lane_f16(__p0, __p1, __p2) __extension__ ({ \ float16x4x4_t __s1 = __p1; \ __builtin_neon_vst4_lane_v(__p0, __s1.val[0],
2008 Dec 04
7
Win32 GUI Client
Can anyone recommend a good win32 GUI rsync client? -------------- next part -------------- HTML attachment scrubbed and removed
2016 Jan 22
2
Clang 3.8 fails with asan enabled
Kostya, all, I'm trying to build my project by clang 3.8rc1 with enabled asan (clang itself is address sanitized) and it fails on several files from my project (ISPC, https://github.com/ispc/ispc). I've reproduced this on MacOS and Linux. Please let me know if you need any other info. How to reproduce: 1) Build address sanitized clang 3.8rc1: cd /path-to-working-dir svn co
2016 Mar 18
2
LLVM IR temporary variable reuse
For eg: c=a-b is represented using the following statements in IR: %tmp = load i32, i32* %a, align 4 %tmp1 = load i32, i32* %b, align 4 %sub = sub nsw i32 %tmp, %tmp1 store i32 %sub, i32* %c, align 4 whenever there is a redundant computation of the same, say k=a-b (if the value of *a* and *b* are not changed) the code will be like this: %tmp2 = load i32, i32* %a, align 4 %tmp3 =
2016 Aug 04
4
help please: how to sort the contents of a "SymbolTableListTraits<GlobalVariable>"?
Dear sir, Thanks for your reply. I apologize for taking a few days to reply. > Crashed how? Please see the below. > Have you turned on ASan? Not yet, but thanks for the suggestion. I guess I will try to rebuild my modified Clang+LLVM with addr. san. and see what happens. > I recommend attaching a minimal reproduction... Well, since I`m hacking on LLVM itself, this is not
2016 Mar 18
2
LLVM IR temporary variable reuse
I meant LLVM registers. Thanks for the correcting me. On 18 March 2016 at 10:42, David Blaikie <dblaikie at gmail.com> wrote: > Question is hard to understand - the registers in LLVM are in Static > Single Assignment form > <https://en.wikipedia.org/wiki/Static_single_assignment_form>, they're > not variables that can be assigned and reassigned values (so the answer
2016 Jul 27
2
help please: how to sort the contents of a "SymbolTableListTraits<GlobalVariable>"?
Dear all, In the process of trying to add optimization for better layout of global variables, I have run up against a roadblock: I don`t seem to be able to sort the contents of a "SymbolTableListTraits<GlobalVariable>" -- or even swap two elements in that list -- without causing LLVM to crash. I have tried writing a comparator class and then using "llvm::iplist<
2016 Mar 18
2
LLVM IR temporary variable reuse
In any case, Is there any chance for reusing *temporary variable *used in it's IR by LLVM ? -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20160318/f86ad7b7/attachment.html>
2019 Aug 25
5
Illegal instruction (core dumped) LLVM 8.0
Hello, I have implemented a pass to count total number of instructions in LLVM 8.0. Its source code is attached here. The pass runs fine with LLVM 4.0. But with LLVM 8.0 following error is shown; $ $LLVMopt_BIN/opt -load $LLVM_SO/LLVMStatic-Info.so -one output-simple.bc WARNING: You're attempting to print out a bitcode file. This is inadvisable as it may cause display problems. If you REALLY
2015 Feb 25
2
[LLVMdev] [lld][PECOFF] assert from lld once in 5 test runs.
Hi Rui, Not sure if you have seen this problem, but I have been running into this problem when I run the lld tests and the failure occurence is once in 5 times. lld: ../tools/lld/lib/Core/Resolver.cpp:402: void lld::Resolver::deadStripOptimize(): Assertion `symAtom' failed. #0 0x4b05ae llvm::sys::PrintStackTrace(_IO_FILE*)
2019 Oct 17
4
llvm-strip creates unloadable shared objects on linux-armv7hf
Hello Rui, Thanks for your reply. I tried with the keep-section argument and that made the shared library work. Should these sections be kept around by default maybe? -- Tobias On Thu, Oct 17, 2019 at 11:06 AM Rui Ueyama <ruiu at google.com> wrote: > > One thing I noticed is that llvm-strip seemed to remove a .ARM.attributes section. Can you try --keep-section=.ARM.attributes to
2010 Feb 22
2
[LLVMdev] how to build eglibc using llvm-gcc without unsupported -fno-toplevel-reorder
Hi, llvm doesn't support -fno-toplevel-reorder option which affects glibc/eglibc for some targets. http://www.llvm.org/bugs/show_bug.cgi?id=6364 >From conversations with gcc and eglibc maintainers, seems option is highly expected and is not going to deprecate. >> 2010/2/23 Ian Lance Taylor <iant at google.com>: >> If option is going to deprecate in gcc in near future as
2010 Feb 21
0
[LLVMdev] how to build eglibc using llvm-gcc without unsupported -fno-toplevel-reorder
On 2010-02-21 23:36, Sergey Yakoushkin wrote: > Hi, Rafael > > Inlined asm markup inside functions and on the top level is used to > split asm prologue/epilogue parts in very fine-grained manner. > So, splitting source c won't give the same result. You could have 2 files: - 1 which contains the function, and a marker where prolog ends (beginning of file is implicit marker of
2010 Feb 21
1
[LLVMdev] how to build eglibc using llvm-gcc without unsupported -fno-toplevel-reorder
Hi, Rafael Inlined asm markup inside functions and on the top level is used to split asm prologue/epilogue parts in very fine-grained manner. So, splitting source c won't give the same result. Regards, Sergey Y. 2010/2/22 Rafael Espindola <espindola at google.com> I haven't looked at the code, but why can't you split the .c files > into multiple files instead of splitting
2017 Nov 14
6
[GlobalISel][AArch64] Toward flipping the switch for O0: Please give it a try!
To give an update here, we actually are not missing a mapping. The code complains because we are copying around a fp16 into a gpr32 and that shouldn’t be done with a copy (default mapping). I extended the repairing code to issue G_ANYEXT in those cases instead of asserting. However, now, I have to teach instruction select about those ANYEXT otherwise we’ll fallback in that case. But that’s a
2013 Feb 23
2
Bug#701445: xcp-vncterm: ftbfs with eglibc-2.17
Package: src:xcp-vncterm Version: 0.1-2 Severity: important Tags: sid jessie User: debian-glibc at lists.debian.org Usertags: ftbfs-glibc-2.17 The package fails to build in a test rebuild on at least amd64 with eglibc-2.17, but succeeds to build with eglibc-2.13. The severity of this report may be raised before the jessie release. The test rebuild was done together with GCC-4.8, so some issues
2016 Oct 17
2
Assertion fail/crash in X86FrameLowering::GetFrameIndexReference SEH
Hi, I'm gettign an assertion fail/crash in X86FrameLowering::GetFrameIndexReference when compiling the following bitcode: https://gist.github.com/carlokok/868cddebeb9acc8ccbac6253de0480b0 I tried removing the llvm.frameaddres calls but that's not it, where can I start looking for what my mistake here is? Code seems to verify just fine. ; #0 0x00e1afe8
2013 Dec 17
3
[LLVMdev] Trying to use patchpoint in MCJIT
Hi all, I'm trying to play with patchoint (with MCJIT and VMKit) and I don't understand something. I generate this call for my first patch point. Basically, I want to call f(0). %5 = call i64 (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.i64( i64 42, ;; patch point id is 42 i32 0, ;; 0 bytes for the padding i8* bitcast (i32 (i32)* @f to i8*), ;; my function f i32 1,
2017 Nov 14
2
[GlobalISel][AArch64] Toward flipping the switch for O0: Please give it a try!
Hi Quentin, I’ve started running an ABI test suite with global isel on AArch64, and while it hasn’t found any ABI issues it has hit an assertion in clang when using the __fp16 type. Here’s a reproducer: __fp16 pass_f16(__fp16 p) { return p; } $ /work/llvm/build/bin/clang --target=aarch64-arm-none-eabi -march=armv8-a -c test.c -O0 -mllvm -global-isel -mllvm -global-isel-abort=0