similar to: rol/ror IR support question

Hi llvm-community, I use llc (3.4-final) to generate object file: *llc code.bc -mtriple=x86_64-pc-win32-elf -mcpu=x86-64 -filetype=obj -code-model=large -o=code.o* then I load it with *RuntimeDyld + SectionMemoryManager* in my app. I faced the problem described in 15356 <http://llvm.org/bugs/show_bug.cgi?id=15356>bug. Debug assertion fails at

On 10/27/16 11:18 AM, Aliaksei Zasenka via llvm-dev wrote: > Hi all, > Can anyone give me advice about an appropriate way for extracting > number of functions from module recursively (starting from entry > point). Actually it may be more than one entry point so all dependent > functions and global values must be extracted. > > I've tried llvm-extract tool but it

Hi all, Can anyone give me advice about an appropriate way for extracting number of functions from module recursively (starting from entry point). Actually it may be more than one entry point so all dependent functions and global values must be extracted. I've tried llvm-extract tool but it can't do work recursively. Maybe it would be good to write some Call Graph pass or something. Any

I would think that the R_X86_64_PC32 relocation type should never be generated with large code model since large code model, by definition, makes no assumptions about the size or address of sections. The use of win32-elf might throw a wrinkle into this, since that is a code path that probably isn't exercised much outside of MCJIT use. That said, when this assertion fails it is usually

Hi all, Need your help. I added some debug information to my code according to Kaleidoscope-9 sample and got stuck with a GDB error: (gdb) info functions > invalid dwarf2 offset 1849950870 > My module is a DLL built with llc+ld toolchain. Target triple: 'i686-w64-mingw32'. Looking this offset (1849950870 == 0x6e440296) in dwarfdump output of the dll gave the following:

Hi all, In my MSVC-compiled project I am using MCJIT to run some generated code. I faced that in case of Win64 ('x86_64-pc-win32-elf') __try/__except block doesn't work - the stack can not be unwound. I have found that the only way to fix it is implementing my own *registerEHFrames* function of the Memory Manager (but I'm not sure this helps). Maybe someone had a success solving

Hi all, Consider the following example: define void @fn(i8* %buf) #0 { entry: %arrayidx = getelementptr i8* %buf, i64 18 tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %arrayidx, i8* %buf, i64 18, i32 1, i1 false) %arrayidx1 = getelementptr i8* %buf, i64 18 store i8 1, i8* %arrayidx1, align 1 tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %buf, i8* %arrayidx, i64 18, i32 1, i1 false)

--- On Tue, 2/3/09, Owen Anderson <resistor at mac.com> wrote: > From: Owen Anderson <resistor at mac.com> > Subject: Re: [LLVMdev] rol/ror llvm instruction set > To: kasra_n500 at yahoo.com, "LLVM Developers Mailing List" <llvmdev at cs.uiuc.edu> > Date: Tuesday, February 3, 2009, 4:20 PM > On Feb 3, 2009, at 3:54 PM, Kasra wrote: > > I guess the

On Feb 3, 2009, at 3:54 PM, Kasra wrote: > I guess the backends could know about the instructions. But I am not > convinced why it is beneficial not to have ROR and ROL instructions > within llvm. > How would it be beneficial to have them, if we already generate them at the target level properly? Adding instructions "just because" doesn't seem wise. -Owen

--- On Tue, 2/3/09, Bill Wendling <isanbard at gmail.com> wrote: > From: Bill Wendling <isanbard at gmail.com> > Subject: Re: [LLVMdev] rol/ror llvm instruction set > To: "LLVM Developers Mailing List" <llvmdev at cs.uiuc.edu> > Cc: kasra_n500 at yahoo.com > Date: Tuesday, February 3, 2009, 2:52 PM > On Tue, Feb 3, 2009 at 2:45 PM, Dale Johannesen

On Tue, Feb 3, 2009 at 3:54 PM, Kasra <kasra_n500 at yahoo.com> wrote: > > I guess the backends could know about the instructions. But I am not convinced why it is beneficial not to have ROR and ROL instructions within llvm. > I guess I could ask you the opposite question: What is the benefit of having these? They would have to be mappable to the source language in some way. I'm

--- On Tue, 2/3/09, Bill Wendling <isanbard at gmail.com> wrote: > From: Bill Wendling <isanbard at gmail.com> > Subject: Re: [LLVMdev] rol/ror llvm instruction set > To: kasra_n500 at yahoo.com, "LLVM Developers Mailing List" <llvmdev at cs.uiuc.edu> > Date: Tuesday, February 3, 2009, 4:17 PM > On Tue, Feb 3, 2009 at 3:54 PM, Kasra > <kasra_n500

Thanks Nick for the compile. I think the case for rol/ror is closed. Since LLVM optomises the code into rotations anyway. -- Kasra

Hi, I was looking around the LLVM instruction set and I failed to find ROL and ROR instructions. Is there any plans on adding these instructions to LLVM? The reason that I am asking is for cryptographical algorithms which are becoming ever more important rotation is a major operation. Thus including such instruction could reduce 3 instructions {shl, shr, or} into {rol | ror} which could gain

On Feb 3, 2009, at 2:28 PM, Kasra wrote: > I was looking around the LLVM instruction set and I failed to find > ROL and ROR instructions. Is there any plans on adding these > instructions to LLVM? Not sure what you mean: $ cat t.c unsigned int rol(unsigned int i) { return i << 1 | i >> 31; } mrs $ clang -S t.c -O2 mrs $ cat t.s .text .align 4,0x90 .globl _rol

On Tue, Feb 3, 2009 at 2:45 PM, Dale Johannesen <dalej at apple.com> wrote: > > On Feb 3, 2009, at 2:35 PMPST, Mike Stump wrote: > >> On Feb 3, 2009, at 2:28 PM, Kasra wrote: >>> I was looking around the LLVM instruction set and I failed to find >>> ROL and ROR instructions. Is there any plans on adding these >>> instructions to LLVM? >>

On Feb 3, 2009, at 2:35 PMPST, Mike Stump wrote: > On Feb 3, 2009, at 2:28 PM, Kasra wrote: >> I was looking around the LLVM instruction set and I failed to find >> ROL and ROR instructions. Is there any plans on adding these >> instructions to LLVM? > > Not sure what you mean: He's referring to the LLVM IR, I think, and it's true that doesn't have

Dale Johannesen wrote: >On Feb 3, 2009, at 2:35 PMPST, Mike Stump wrote: >> On Feb 3, 2009, at 2:28 PM, Kasra wrote: >>> I was looking around the LLVM instruction set and I failed to find >>> ROL and ROR instructions. Is there any plans on adding these >>> instructions to LLVM? >> >> Not sure what you mean: > > He's referring to the LLVM

Hi Bill, > I guess I could ask you the opposite question: What is the benefit of > having these? They would have to be mappable to the source language in > some way. I'm not sure about Ada, but I don't know of a "rotate" > operator for any of the C variants, or any other high-level language.. Ada has rotate. Ciao, Duncan.

On Tue, Feb 3, 2009 at 10:23 PM, Duncan Sands <baldrick at free.fr> wrote: > Hi Bill, > >> I guess I could ask you the opposite question: What is the benefit of >> having these? They would have to be mappable to the source language in >> some way. I'm not sure about Ada, but I don't know of a "rotate" >> operator for any of the C variants, or