similar to: Adding mem2reg pass to pass manager

Displaying 20 results from an estimated 500 matches similar to: "Adding mem2reg pass to pass manager"

2015 Jun 18
2
[LLVMdev] Do all the debug nodes in LLVM IR also compiles to DWARF?
Hi As the title says, are all the debug nodes of LLVM IR avaialble in DWARF? If I add a new custom MDNode in LLVM IR, can I expect the debug data will be available in DWARF in the binary if I compile in debug mode? Thanks Riyad -------------- next part -------------- An HTML attachment was scrubbed... URL:
2015 May 13
2
[LLVMdev] Modifying debug information through llvm pass
Hi All, I want to change debug information of an llvm instruction so that the modified debug info is subsequently passed to executable binary. So if I use "addr2line" utility on the binary, it will return my modified debug information. I've tried to change by using the following code snippet: MDNode *N = Inst->getMetadata("dbg"); DebugLoc Loc =
2015 Oct 09
2
Get instance of CallGraph of a module in the pass
Hello, I want an instance of CallGraph in my pass. By looking at -dot-callgraph source, I've tried something like this: CallGraphWrapperPass *CGWP = new CallGraphWrapperPass(); PM.add(CGWP); CallGraph *CG = &CGWP->getCallGraph(); PM.add(new MyPass(CG)); I get the following error: /home/riyad/installs/llvm-3.7.0/include/llvm/PassSupport.h:95:38: error: no matching constructor for
2015 Dec 08
3
Get root node of CallGraph
Hi, There is a "Root" private member in CallGraph <http://llvm.org/docs/doxygen/html/CallGraph_8h_source.html#l00192> class. But there is no way to get access to that member. How can I do that? I can get CallGraphNode of "main" method. But I am curious is there more cleaner way. Thanks, Riyad -------------- next part -------------- An HTML attachment was scrubbed...
2015 Dec 01
2
LICM doesn't work for IntrReadMem intrinsic function
Thanks for your reply, escha, Yes, -loop-rorate makes it work. Regards, Xiangyang 2015-12-01 12:48 GMT-05:00 <escha at apple.com>: > > > On Dec 1, 2015, at 9:30 AM, Xiangyang Guo via llvm-dev < > llvm-dev at lists.llvm.org> wrote: > > > > Hi, All, > > > > Suppose I define one memory read only intrinsic function "foo" in >
2015 Dec 01
3
LICM doesn't work for IntrReadMem intrinsic function
On 1 December 2015 at 12:33, Xiangyang Guo via llvm-dev <llvm-dev at lists.llvm.org> wrote: > if I have the following IR, LICM doesn't work again, even if I use > '-loop-rotate' firstly. In this IR, the return value of intrinsic function > "foo" is used by another function "func2" as parameter. However, for the > intrinsic function
2009 Aug 04
3
matrix
Hi I have dataset that consists of two columns AB 0.102 AC -0.002 BA -0.102 BC 0.270 CA 0.002 CB -0.270 I wish to create a matrix so that I can eventually plot the data. A B C A 1 0.102 -0.002 B -0.102 1 0.27 C 0.002 -0.27 1 Any help or guidance would be greatly
2017 Feb 22
2
[Job Ad] Compiler Engineer positions at Intel
Hi, All, Our team within the Software and Services Group at Intel is looking for compiler engineers to join us. Currently two positions are available, see attached links. If you are interested, you can apply online or email me at xiangyang.guo at intel.com. Thanks. --Xiangyang (Mark) Guo
2015 Apr 24
2
[LLVMdev] convert LLVM IR to another IR without SSA
Hi, Diego, Thanks for your quick reply. Inserting a copy instruction may not work here because I have a limitation of virtual register number. I need to assign registers with ssa form to registers without ssa form. I will look the source code you point out. Thanks Xiangyang On Fri, Apr 24, 2015 at 4:19 PM, Diego Novillo <dnovillo at google.com> wrote: > > > On Fri, Apr 24, 2015
2015 Dec 02
4
lower 64 bits constant
Hi, All, I want to lower 64 Bits constant such as 'long' and 'double'. So I define them like this: def CONSTI64 : InstFOO<(outs GRWideRegs:$dst), (ins i64imm:$src), "const-long $dst, $src", [(set (i64 GRWideRegs:$dst), imm:$src)]>{ let isMoveImm = 1; } def CONSTF64 : InstFOO<(outs
2015 Aug 21
2
loop unrolling introduces conditional branch
There's been some recent noise on the mailing list about requiring -fno-rtti; http://lists.llvm.org/pipermail/llvm-dev/2015-August/089010.html Could that be it? On Sat, Aug 22, 2015 at 12:21 AM, Xiangyang Guo via llvm-dev < llvm-dev at lists.llvm.org> wrote: > Hi, James and Philip, Thanks for your help. > > Based on your advice, I downloaded llvm-3.7. However, with this new
2016 Mar 24
4
attribute of intrinsic function
Hi, When I define an intrinsic function with memory write permission, my assumption is that we can either attach [IntrReadWriteArgMem] or [] to the intrinsic function. Based on the comment of the source code , "IntrReadWriteArgMem - This intrinsic reads and writes only from memory that one of its arguments points to, but may access an unspecified amount." "If no property is set,
2016 Feb 03
2
TableGen register class
Hi, Assume I define registers R0...R15 and two register classes RegA and RegB. RegA contains R0 to R7 while RegB contains R0 to R15. Then I check the machine instruction, it seems that in some cases, the %vreg0 belongs to RegB; in other cases %vreg1 belongs to RegA_RegB. Can you tell me how TableGen decides which is which? At first, I guess &verg0 will be assigned by R8 to R15 only so that
2015 Apr 19
2
[LLVMdev] remove redundant load by GVN() does not work
Hi, Assume I have the following code. The first four instructions in each BB does the same thing. So I think GVN() can remove the redundant code. However, after I apply GVN to my module by "Passes.add(createGVNPass())" and "Passes.run(*myModule)". It seems GVN does not remove the redundant instructions. Can anyone give me a hint what's going on here? Any hint is
2015 Aug 20
2
loop unrolling introduces conditional branch
Hi Xiangyang, The algorithm for loop unrolling was changed post-3.5 to do more what you'd expect. If you use 3.6 or 3.7 you'll likely get better results. Cheers, James On Thu, 20 Aug 2015 at 18:09 Philip Reames via llvm-dev < llvm-dev at lists.llvm.org> wrote: > On 08/20/2015 07:38 AM, Xiangyang Guo via llvm-dev wrote: > > Hi, > > I want to use loop unrolling
2016 Mar 25
1
attribute of intrinsic function
Thanks for your reply, Philip. You are right, when I use LLVM-3.8, the 'argmemonly' shows up. Previously, I use LLVM-3.7. I think idempotent is what I want. Can you tell me how to add idempotent attribute to the function? Thanks. Regards, Xiangyang 2016-03-24 14:30 GMT-07:00 Philip Reames <listmail at philipreames.com>: > > > On 03/24/2016 12:45 PM, Xiangyang Guo via
2013 Sep 13
2
[LLVMdev] [Polly] Compile-time and Execution-time analysis for the SCEV canonicalization
At 2013-09-09 13:07:07,"Tobias Grosser" <tobias at grosser.es> wrote: >On 09/09/2013 05:18 AM, Star Tan wrote: >> >> At 2013-09-09 05:52:35,"Tobias Grosser" <tobias at grosser.es> wrote: >> >>> On 09/08/2013 08:03 PM, Star Tan wrote: >>> Also, I wonder if your runs include the dependence analysis. If this is >>> the
2015 Aug 25
2
how LLVM deals with 'undef'
Hi, I'm using LLVM-3.8 (current SVN version) to optimize my code. After loop unrolling, I find there is 'undef' in the IR. For example, "*%.lcssa21.unr = phi double [ undef, %.lr.ph9 ], [ %13, %7 ]*". I have two questions: (1) Why this 'undef' is generated? Because before 'loop unrolling', there is no such 'undef'. (2) How LLVM backend deals with
2015 Dec 01
2
LICM doesn't work for IntrReadMem intrinsic function
Hi, All, Suppose I define one memory read only intrinsic function "foo" in Intrinsics.td like this def int_foo : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrReadMem]>; Suppose I have the following IR, which means the intrinsic function "foo" is called 10 times in a loop. Since the parameters of function "foo" are invariant and the function
2015 Aug 22
2
loop unrolling introduces conditional branch
Hi, I just tried llvm-3.8 (LLVM SVN Repository). With this version, -fno-rtti can help me to compile my code and -irce can help me to do a better job for loop unrolling. However, I still have one question. If I use Clang to compile a piece of c++ code to .bc and then use 'opt -loop-rotate -loop-unroll -irce', I can get what I want. I mean, there is no conditional branch at the end of each