similar to: [libunwind][Mips] Problem using gas to assemble UnwindRegistersSave.S

On 09/27/2015 06:41 PM, Vasileios Kalintiris wrote: > Hi Richard, > > Clang doesn't have support for MIPS I. The trap-on-condition instructions were added in MIPS II and they should work fine. This is why it works with ".set mips32r2". > > Which version of the ISA did you specify when you used the integrated assembler? > > Thanks, > Vasileios > > Hi

> > Should the integrated assembler be enabled by default for the Mips? > > Not yet. There's a number of quiet mis-assembly bugs at the moment. The > plan is to switch it on once it's good enough for the Linux kernel and see what > bug reports come back. Having said this, we had our first successful boot of the Linux kernel build with clang and -fintegrated-as today.

My guess is he wants mips1 so that he doesn't have to worry about the patented mips instructions? At any rate, it will be a bit of work to enable a mips1 target and I doubt many people are interested, so it'll definitely be up to him to do the work. -eric On Fri, Apr 26, 2013 at 10:15 AM, Reed Kotler <rkotler at mips.com> wrote: > If you want to create a version for the mips1

If you want to create a version for the mips1 subtarget, going back in time will probably be a lot of work for you. If you want to modify the current version you might try the following: 1) Create a Mips1 predicate and use that to disable instruction patterns that match using non Mips1 instructions. 2) Use soft-float 3) You would need to reenable some commented out code used to implement

Hi Everybody, I'm working a project which requires assembly code for mips1 architecture for simulation purpose. I checked the latest LLVM3.2 version and found that the backend has been removed. I tried to replace the MIPS backed in LLVM3.2 by the old one in LLVM2.9 (which contains mips1) and adjust some routines to get the backend compiled. However, when llc is used to generate the assembly,

Hello Paul and Simon, (Sorry - I'm not sure about the social conventions in mailing lists) Both of your answers helped me a lot! So If I understand it correctly, Clang knows what 'mips1' and 'mips5' are - but can't generate code for it? Why is it like that? I actually have a more in general questions about processors... If this is the wrong place for it, please ignore it,

Commit-ID: 59f3f33338f371b3a30163406fbb5fe323503939 Gitweb: http://git.kernel.org/?p=libs/klibc/klibc.git;a=commit;h=59f3f33338f371b3a30163406fbb5fe323503939 Author: James Cowgill <james.cowgill at mips.com> AuthorDate: Fri, 2 Mar 2018 08:33:02 -0800 Committer: Ben Hutchings <ben at decadent.org.uk> CommitDate: Wed, 2 Jan 2019 03:08:04 +0000 [klibc] mips/mips64: simplify

Introduce Cortex-A7 with a scalable proc_info_list which including cpu id and cpu initialize function. In head.S, search cpu specific MIDR in procinfo and call such initialize function. Currently, support Cortex-A7 and Cortex-A15. Signed-off-by: Bamvor Jian Zhang <bjzhang@suse.com> --- changes since v2 1), define cpu_init function instead of assemble jump code in struct proc_info_list 2),

It will produce little-endian code if you replace "mips" with "mipsel". 1. clang -ccc-host-triple mipsel-unknown-linux -ccc-clang-archs mipsel -O3 -S -emit-llvm foo.c -o foo.ll 2. llc -march=mipsel -mcpu=4ke foo.ll -o foo.s (the -march option is redundant) If you do not specify the target cpu with -mcpu, by default it will generate code for Mips1, which has not been tested as

Hi, We have tried and generate assembly code for very simple test C code. But, binutils-2.5.2 (simplesim-3.0) cannot handle the produced assembly code with the following complaints. Could you advise which version of bitutils that we need to use for mips code with LLVM with Clang? Thanks, $ GCC addr01.s addr01.s: Assembler messages: addr01.s:1: Error: Unknown pseudo-op: `.section'

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Hi All, Xandros 3.0.1 OCE (Debian based). ./configure executed without problem (once I installed bison++). Then 'make depend && make' resulted in the errors below. Apologies for the length of the mail, but I don't want to miss out anything which may be vital :) Any suggestions would be gratefully received. Kind regards,

- my old email address. The ISA_* classes might not be the best choice for this. There's an overall hierarchy and ordering to the ISA_* classes since they represent the generations of the MIPS ISA. If these extensions are available in Loongson chips based on MIPS32r1 and MIPS32r2 for example, it becomes difficult to describe with ISA_* classes without duplicating instruction definitions or

These series patch enable Allwinner A31(code name sun6i) support in assemble. with these patches, the cpu 0 of sun6i SOC could successful boot into the c environment. Bamvor Jian Zhang (4): xen/arm: introduce Cortex-A7 support xen/arm: introduce Allwinner sun6i SOC basic support xen/arm: enable early printk for sun6i xen/arm: enable switch to hyper mode for sun6i xen/arch/arm/Rules.mk

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The term "target" is somewhat overloaded. When llvm-config tells you it was built with the X86 target, that actually includes a variety of closely related architectures, such as x86_64, i386, and so on. Within the x86_64 architecture, there are many individual processor implementations that LLVM understands, such as Skylake, Bulldozer, and many many more. What *clang* means by

Hi all, Is there any way to cross-compile LLVM and run check-all, or just the llvm-lit tests, (after moving the build directory) on the target machine? As far as I can tell from the CMakefiles, there's support only for cross-compiling LLVM and not for running the tests with the resulting compiler. Thanks, Vasileios

Hi all, My understanding is that we keep around KILL instructions in order to keep the results of the various register liveness analysis passes valid. Consider for example the following machine basic block: BB#0: derived from LLVM BB %entry Live Ins: %A0_64 %A1_64 %V0_64<def> = AND64 %A0_64<kill>, %A1_64<kill> %V0<def> = KILL %V0,

On Tue, 12 Jul 2005, Aaron Gray wrote: >>>> Sure, but presumably you want to differentiate between nasm and masm (if >>>> they are not compatible) right? >>> >>> Right >> >> Then you need something more specific than 'isWindows'. I'd suggest, >> isNASM and isMASM. > > 'for' rather than 'is' Yeah

Jeff Cohen wrote: > Chris Lattner wrote: > >> On Tue, 12 Jul 2005, Aaron Gray wrote: >> >>>>>> Sure, but presumably you want to differentiate between nasm and >>>>>> masm (if they are not compatible) right? >>>>> >>>>> >>>>> >>>>> Right >>>> >>>>

I have a question not strictly related to LLVM: I know there is a tool (libdwarf / dwarfdump) to dump/parse debug information of an object file, but do you know a tool that can parse dwarf sections of a ".s" GAS assembly file ? Thank you, Damien -------------- next part -------------- An HTML attachment was scrubbed... URL: