similar to: Parse Instruction

Hi ES, From what I understand instruction parsing is divided into two parts: - Parsing an operand list (XXXAsmParser::ParseInstruction) - Turning the operand list into an actual instruction (XXXAsmParser::MatchAndEmitInstruction) The second part does the validation (e.g. how many operands, what kind, etc) while the first part only does the parsing. That's why I think in the first part

Hello all, I would like to assign some bits in the instructions, based on the order of mnemonics that appear in a special order. I can do it in TableGen itself, but it will not be well maintainable based on the things I want to accomplish. Therefor, I would like to do it in the c++ file which is waaay easier (at least in the concept!!). Imagine I have this in my base class in TableGen:

Hi, I'm trying to enable the hexagon LLVM assembly parser. It seem like there is a lot of work that has been done to make this parsing straightforward. But.. Hexagon assembly does not follow the "Mnemonic Rx Rx ." format that is expected by the assembly parsing infrastructure, represented by: StringRef Mnemonic = ((ARMOperand*)Operands[0])->getToken(); This

On Oct 17, 2012, at 3:29 PM, David Young <davidy at codeaurora.org> wrote: > Hi, > I’m trying to enable the hexagon LLVM assembly parser. It seem like there is a lot of work that has been done to make this parsing straightforward. > > But…. > Hexagon assembly does not follow the “Mnemonic Rx Rx …” format that is expected by the assembly parsing infrastructure,

Hi Daniel, attached is a patch that pushes most of the object file specific parsing out of AsmParser and down into MachOAsmParser. This was done as a cleanup for the ELF work. I know that you're not happy with this approach, particularly the fact that as we add more object file formats and assembler dialects, it's going to cause a class explosion. But I was hoping that we could use this

Hi David, Thanks for your efforts here. I have a few comments on your patch, although I realise it's still a work in progress. +class ConstantPool { + MCSymbol *Label; + typedef std::vector<const MCExpr*> EntryVecTy; Use a SmallVector here? + MCSymbol *getLabel() {return Label;} + size_t getNumEntries() {return Entries.size();} + const MCExpr *getEntry(size_t Num) {return

For example something like STARTUP ( http://wiki.osdev.org/Linker_Scripts#STARTUP) is not accepted by the LLVM LLD. :-/ On Wed, Apr 20, 2016 at 9:08 PM, Sky Flyer <skylake007 at gmail.com> wrote: > Yeah I found it, that's nice. Thanks a milion. > Could you please tell me how can I specify my bootstrap (startup code) in > the linking process? > > > On Wed, Apr 20, 2016

Hi, I want to encode Loongson ISA initially https://gist.github.com/xiangzhai/8ae6966e2f02a94e180dd16ff1cd60ac gslbx           $2,0($3,$4) It is equivalent to: dadd $1, $3, $4 lb $2,0($1) I just use  mem_simmptr  as the default value of  DAGOperand MO , because  MipsMemAsmOperand  use  parseMemOperand  to parse general  MemOffset  and only *one*  AnyRegister , for example: 0($1) But 

search for VAStart. Cheers, Rafael On 20 April 2016 at 14:18, Sky Flyer <skylake007 at gmail.com> wrote: > Hi Rafael, > > Thanks a lot. > For example the start entry for me is 0x11000 by default which I don't know > where it come from! I thought there should be a default thing that sets this > entry address. > > On Wed, Apr 20, 2016 at 8:05 PM, Rafael Espíndola

Hi Amara, Thanks for your suggestions. I have made the changes you suggested and added a new test to check that we print an error when parsing a non-ldr mnemonic with an operand containing `=`. The updated patch is attached. -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation > -----Original Message----- > From: Amara Emerson

Hi, That's what the DecoderMethod is for. Similarly ParserMatchClass for the asm parser and PrintMethod for the asm printer: def CondCodeOperand : AsmOperandClass { let Name = "CondCode"; } def pred : PredicateOperand<OtherVT, (ops i32imm, i32imm), (ops (i32 14), (i32 zero_reg))> { let PrintMethod = "printPredicateOperand";

There is no default linker script. Cheers, Rafael On 20 April 2016 at 11:23, Sky Flyer via llvm-dev <llvm-dev at lists.llvm.org> wrote: > for instance, where is the internal default linker script located? How can I > change the default values, for example the star address... > > On Wed, Apr 20, 2016 at 5:17 PM, Sky Flyer <skylake007 at gmail.com> wrote: >> >>

Hi all, I am trying to implement an instruction with no operand for example "clr" in TableGen. ----------------------------------------- e.g. *InstrInfo.td:* class TestInst<string opc, string asmstr, dag oops, dag iops, list<dag> pattern> : Instruction { ... } def int_no_operand : Intrinsic<[]>; class ALU<string opc> : TestInst<opc,

Hello all, I don't find anything helping me understand the llvm bang operator. In the llvm TableGen language reference, it only says: 'TableGen also has “bang operators” which have a wide variety of meanings: *'* I would be very thankful if someone can explain it to me. e.g. what does "!strconcat" or "!if" mean? Cheers ES -------------- next part --------------

Hello James, that was also what I've planned to do but just wasn't sure. Thanks for that. On Mon, Dec 14, 2015 at 11:52 AM, James Molloy <james at jamesmolloy.co.uk> wrote: > Hi, > > You can't nest operands like that - it must be a flattened list. So: > > def *Xpred* : PredicateOperand<OtherVT, (ops *i32imm, i32imm*, i32imm), > (ops (i32 14), (i32

Hi all, How does the new lld implementation work with the "Linker Script" for the object file adjustment? I couldn't find enough resources on the web. Any help is highly appreciated. Cheers, ES -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20160420/dc5445e8/attachment-0001.html>

Moving discussion to llvm-commits now that I have a more developed implementation: http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20131111/195401. html > -----Original Message----- > From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On > Behalf Of David Peixotto > Sent: Tuesday, November 12, 2013 11:09 AM > To: 'Amara Emerson' >

On Thu, Jul 23, 2015 at 9:53 AM, Sky Flyer <skylake007 at googlemail.com> wrote: > Hello all, > > I don't find anything helping me understand the llvm bang operator. In the > llvm TableGen language reference, it only says: > > 'TableGen also has “bang operators” which have a wide variety of meanings:' > > I would be very thankful if someone can explain it

I have attached an initial patch that implements the ldr pseudo. It still needs some clean up and more tests, but I would like some feedback on the approach I used and if there are any objections to implementing it this way. Here is my approach: Add a finishParse() callback to the target asm parser This callback is invoked when the parse has finished successfully. It will be used to write out

Thanks a lot Tim. I am getting an error which says: "LLVM ERROR: unable to write nop sequence of 0 bytes" Is there any way that I can print out the Obj code (I mean bitstream representation of the assembly code which is going to be placed in the ELF file), before making any ELF file? Cheers, ES On Tue, Oct 13, 2015 at 3:02 PM, Tim Northover <t.p.northover at gmail.com> wrote: