similar to: LLVM as a back end for HHVM

On 9/3/15, 3:34 PM, "Mehdi Amini" <mehdi.amini at apple.com<mailto:mehdi.amini at apple.com>> wrote: Hi, On Sep 3, 2015, at 1:38 PM, Maksim Panchenko via llvm-dev <llvm-dev at lists.llvm.org<mailto:llvm-dev at lists.llvm.org>> wrote: Hi All, Our team at Hip-Hop Virtual Machine (http://hhvm.com<http://hhvm.com/>) have been experimenting with using LLVM

All, I'm needing volunteers to help moderate the sessions of the LLVM Developers' Meeting. All you need to do is introduce the speaker, make sure the speaker stays on time, and run Q&A at the end (run a microphone, select people, etc). Its a pretty easy job, but critical for our meeting to run smoothly. If you are interested in moderating, please send me your top 2 session choices.

On 9/8/15, 9:35 AM, "Philip Reames" <listmail at philipreames.com> wrote: >On 09/04/2015 11:36 AM, Brett Simmers via llvm-dev wrote: >> On 9/4/15 1:12 AM, Sanjoy Das via llvm-dev wrote: >>> Specifically on "Location records" -- >>> >>> Is it legal for the optimizer to drop the `!locrec` metadata that you >>> attach to

I'm a bit confused by this subthread -- doesn't BOLT have the exact same CFI bloat issue? From my cursory reading of the propellor doc, the CFI duplication is _necessary_ to represent discontiguous functions, not anything particular to the way Propellor happens to generate those discontiguous functions. And emitting discontiguous functions is a fundamental goal of this, right? On Wed,

On Wed, Oct 2, 2019 at 8:41 PM Maksim Panchenko via llvm-dev < llvm-dev at lists.llvm.org> wrote: > *Pessimization/overhead for stack unwinding used by system-wide profilers > and > for exception handling* > > Larger CFI programs put an extra burden on unwinding at runtime as more CFI > (and thus native) instructions have to be executed. This will cause more > overhead

Hello Maksim, On Fri, Oct 18, 2019 at 10:57 AM Maksim Panchenko <maks at fb.com> wrote: > Cool. The new numbers look good. If you run BOLT with jemalloc library > > preloaded, you will likely get a runtime closer to 1 minute. We’ve noticed > that > > compared to the default malloc, it improves the multithreaded > > performance and brings down memory usage

Hello Maksim, On Wed, Oct 16, 2019 at 3:52 PM Maksim Panchenko <maks at fb.com> wrote: > Hi Sri, > > > > I want to clarify one thing before sending a detailed reply: did you > evaluate > > BOLT on Clang built with basic block sections? > In the makefile you reference, > > there are two versions: a “vanilla” and a default built with function > sections.

Yeah, that's probably how I'd do it. Might be useful if you guys want to contribute that as a command line option Kevin. -eric On Tue, Jun 24, 2014 at 3:03 PM, Kevin Modzelewski <kmod at dropbox.com> wrote: > We do this in Pyston using a JITEventListener that just disassembles the > output; it's "it works let's move on"-quality: >

We are going to be at the llvm-dev meeting the next two days. We will get back to you after that. Sri On Mon, Oct 21, 2019 at 10:07 PM Maksim Panchenko <maks at fb.com> wrote: > Hi Sri, > > > > Thank you for replying to our feedback. 7 out 12 high-level concerns have > been > > answered; 2 of them are fully addressed. The rest are being tracked at the > >

On 9/4/15 1:12 AM, Sanjoy Das via llvm-dev wrote: > Specifically on "Location records" -- > > Is it legal for the optimizer to drop the `!locrec` metadata that you > attach to instructions? The general convention in LLVM is that > dropping metadata should not affect correctness, and if the location > record information is not best-effort or optional then metadata is

Is there large value from deferring the block ordering to link time? That is, does the block layout algorithm need to consider global layout issues when deciding which blocks to put together and which to relegate to the far-away part of the code? Or, could the propellor-optimized compile step instead split each function into only 2 pieces -- one containing an "optimally-ordered" set of

We would also like to clarify on the misconceptions around CFI Instructions: There are two things that need to be clarified here: 1) Extra CFI FDE entries for basic blocks does not mean more dynamic instructions are executed. In fact, they do not increase at all. Krys talked about this earlier. 2) We do deduplication of common static CFI instructions in the FDE and move it to the CIE . Hence,

Hello, I wanted to consolidate all the discussions and our final thoughts on the concerns raised. I have attached a document consolidating it. BOLT’s performance gains inspired this work and we believe BOLT is a great piece of engineering. However, there are build environments where scalability is critical and memory limits per process are tight : * Debug Fission,

Some more information about the relaxation pass whose effectiveness and convergence guarantees were listed as a concern: TLDR; Our relaxation pass is similar to what LLVM’s MCAssembler does but with a caveat for efficiency. Our experimental results show it is efficient and convergence is guaranteed. Our relaxation pass is very similar to what MCAssembler does as it needs to solve the same

http://www.youtube.com/watch?v=tDacjrSCeq4 I wonder if the inverse is true. If I whisper soothing words of encouragement at my JBODs, will I get more IOPS with reduced latency? :^)

I'm part of a team working on adding an llvm codegen backend to HHVM (PHP JIT, http://hhvm.com) using MCJIT. We have a code layout problem and I'm looking for opinions on good ways to solve it. The short version is that the memory we emit code into is split into a few different areas, and we'd like a way to control which area each BasicBlock ends up in during codegen. I know this

Motivation === Over the last decade we have developed an interactive, interpretative C++ (aka REPL) as part of the high-energy physics (HEP) data analysis project -- ROOT [1-2]. We invested a significant  effort to replace the CINT C++ interpreter with a newly implemented REPL based on llvm -- cling [3]. The cling infrastructure is a core component of the data analysis framework of ROOT and

I like cling, and having it integrated with the rest of the project would be neat. I agree with Hal’s suggestion to explain the design of what remains. It sounds like a pretty small amount of code. > On Jul 9, 2020, at 7:25 PM, Hal Finkel via cfe-dev <cfe-dev at lists.llvm.org> wrote: > > I think that it would be great to have infrastructure for incremental C++ compilation,

Fixes build error with btrw instruction. xen-unstable/xen/include/asm/grant_table.h:57: Error: Incorrect register `%edx'' used with `w'' suffix Signed-off-by: Lin Ming <mlin@ss.pku.edu.cn> --- xen/include/asm-x86/grant_table.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/xen/include/asm-x86/grant_table.h b/xen/include/asm-x86/grant_table.h

On 7/10/20 1:57 PM, Vassil Vassilev wrote: > On 7/10/20 6:43 AM, JF Bastien wrote: >> I like cling, and having it integrated with the rest of the project >> would be neat. I agree with Hal’s suggestion to explain the design of >> what remains. It sounds like a pretty small amount of code. > > >   JF, Hal, did you mean you want a design document of how cling in >