similar to: llvm bpf debug info. Re: [RFC PATCH v4 3/3] bpf: Introduce function for outputing data to perf event

Displaying 20 results from an estimated 600 matches similar to: "llvm bpf debug info. Re: [RFC PATCH v4 3/3] bpf: Introduce function for outputing data to perf event"

2015 Aug 12
3
llvm bpf debug info. Re: [RFC PATCH v4 3/3] bpf: Introduce function for outputing data to perf event
On 2015/8/12 12:57, Alexei Starovoitov wrote: > On Wed, Aug 12, 2015 at 10:34:43AM +0800, Wangnan (F) via llvm-dev wrote: >> Think about a program like this: >> >> struct strA { int a; } >> struct strB { int b; } >> int func() { >> struct strA a; >> struct strB b; >> >> a.a = 1; >> b.b = 2; >>
2016 Jun 16
2
[iovisor-dev] [PATCH, BPF 1/5] BPF: Use a provisional ELF e_machine value
On Wed, Jun 15, 2016 at 2:37 PM, Richard Henderson via iovisor-dev <iovisor-dev at lists.iovisor.org> wrote: > This same value for EM_BPF is being propagated to glibc, > elfutils, and binutils. great! Can you share the link to glibc and the other patches? > diff --git a/include/llvm/Support/ELF.h b/include/llvm/Support/ELF.h > index 352fd8a..fb8ff71 100644 > ---
2016 Mar 21
1
define intrinsic function with pointer-typed parameter
Hi, If I define a intrinsic function with pointer-typed parameter, for example, def llvm_foo_ptr_ty : LLVMPointerType<llvm_i16_ty>; def int_foo_get : Intrinsic<[llvm_foo_ptr_ty], [llvm_foo_ptr_ty, llvm_i32_ty], [IntrReadArgMem]>; How to lower it for the backend? I'm not sure what kind of register (i16 or i32 or i32) is needed in this case? If the parameter is
2010 Jan 06
2
[LLVMdev] something wrong with .ll file?
I am trying to compile a little intrinsic function for my machine. Here is a dump from clang-cc with --emit-llvm option: ===================== ; ModuleID = 'foo.c' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" target triple = "i386-pc-linux-gnu" @main.i = internal global i32
2015 Aug 14
2
[LLVM RFC] Add llvm.typeid.for intrinsic
This is for BPF output. BPF program output bytes to perf through a tracepoint. For decoding such data, we need a way to describe the format of the buffer. This patch is a try which gives each variable a unique number by introducing a new intrinsic 'llvm.typeid.for'. At the bottom is an example of using that intrinsic and the result of $ clang -target bpf -O2 -c -S ./test_typeid.c
2015 Aug 18
3
[RFC PATCH 1/2] [clang]: Add AuxAttr support
This patch adds EmitTypeAuxAttribute() function to CGDebugInfo, which allows other parts of clang issue auxiliary information through an enumeration type in Dwarf information. For example, by calling DI->EmitTypeAuxAttribute(type, "ID", 1234); We can get following information in dwarf: <1><3f>: Abbrev Number: 3 (DW_TAG_structure_type) <40> DW_AT_name
2010 Jan 06
0
[LLVMdev] something wrong with .ll file?
On Jan 6, 2010, at 1:12 PM, fima rabin wrote: > I am trying to compile a little intrinsic function for my machine. Here is a dump from clang-cc with --emit-llvm option: > ===================== > > ; ModuleID = 'foo.c' > target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" >
2016 Jun 16
2
[iovisor-dev] [PATCH, BPF 1/5] BPF: Use a provisional ELF e_machine value
On 06/16/2016 06:57 PM, Richard Henderson via iovisor-dev wrote: > On 06/15/2016 10:14 PM, Alexei Starovoitov wrote: >> On Wed, Jun 15, 2016 at 2:37 PM, Richard Henderson via iovisor-dev >> <iovisor-dev at lists.iovisor.org> wrote: >>> This same value for EM_BPF is being propagated to glibc, >>> elfutils, and binutils. >> >> great! >> Can
2012 Nov 06
4
[LLVMdev] FW: Bug in SelectionDAG visitTargetIntrinsic
From: Villmow, Micah Sent: Tuesday, November 06, 2012 1:37 PM To: 'llvm-dev at cs.uiuc.edu' Cc: Guo, Xiaoyi Subject: Bug in SelectionDAG visitTargetIntrinsic We ran into a problem where specifying IntrNoMem was causing our instruction selection to fail with target specific intrinsics. After looking into the code and ISel debug it looks like tablegen and SelectionDAG are using different
2009 Mar 02
2
[LLVMdev] Intrinsic cannot use illegal type
Hello everybody, I use a target specific Intrinsic that returns an illegal type. The idea is that this returned value shall be eliminated when the Intrinsic node is lowered to a target node. I realize that this is a rather late stage, since (at least) SelectionDAGLowering::visitTargetIntrinsic() requires legal types, and type legalization in general is also done before ISelLowering. The
2012 Nov 06
0
[LLVMdev] Bug in SelectionDAG visitTargetIntrinsic
void SelectionDAGBuilder::visitTargetIntrinsic(const CallInst &I, - unsigned Intrinsic) { - bool HasChain = !I.doesNotAccessMemory(); - bool OnlyLoad = HasChain && I.onlyReadsMemory(); + unsigned Intrinsic) { + // Info is set by getTgtMemInstrinsic + TargetLowering::IntrinsicInfo Info; + bool
2015 Aug 05
2
[LLVMdev] Cc llvmdev: Re: llvm bpf debug info. Re: [RFC PATCH v4 3/3] bpf: Introduce function for outputing data to perf event
Send again since llvmdev is moved to llvm-dev at lists.llvm.org On 2015/8/5 9:58, Wangnan (F) wrote: > > > On 2015/8/4 17:01, Wangnan (F) wrote: >> For people who in llvmdev: >> >> This mail is belong to a thread in linux kernel mailing list, the >> first message >> can be retrived from: >> >> http://lkml.kernel.org/r/55B1535E.8090406 at
2009 Mar 03
0
[LLVMdev] Intrinsic cannot use illegal type
Hi Christian, > I use a target specific Intrinsic that returns an illegal type. > The idea is that this returned value shall be eliminated when the > Intrinsic node is lowered to a target node. > I realize that this is a rather late stage, since (at least) > SelectionDAGLowering::visitTargetIntrinsic() requires legal types, > and type legalization in general is also done before
2020 Jul 20
2
[ARM] Should Use Load and Store with Register Offset
Hello LLVM Community (specifically anyone working with ARM Cortex-M), While trying to compile the Newlib C library I found that Clang10 was generating slightly larger binaries than the libc from the prebuilt gcc-arm-none-eabi toolchain. I looked at a few specific functions (memcpy, strcpy, etc.) and noticed that LLVM does not tend to generate load/store instructions with a register offset (e.g.
2008 Nov 11
2
Memory corruption on Gallium window resize, diagnosed?
Hi, I've been playing with nouveau/mesa branch gallium-0.1, trying to get trivial/tri working on nv20 (with nv10 code). When ever I resize the window, it ends up in an assert failure: #0 0xf790744f in _debug_assert_fail (expr=0xf791908f "0", file=0xf7919050 "nv20_state_emit.c", line=139, function=0xf7919034 "nv20_state_emit_framebuffer") at p_debug.c:335
2014 Jul 18
2
[LLVMdev] how to define INTRINSIC_W_CHAIN
Tks Tom, That is my confusing part. How can I make it to "access memory” so it will HasChain? Is there any flag set like in typeProfile, Node, instructions? myLoad, mayStore, SDNPHasChain? -kevin On Jul 18, 2014, at 4:26 PM, Tom Stellard <tom at stellard.net> wrote: > On Fri, Jul 18, 2014 at 04:15:45PM -0400, kewuzhang wrote: >> sure! >> >> class
2020 Jul 21
2
[ARM] Should Use Load and Store with Register Offset
Hello Sjoerd, Thank you for your response! I was not aware that -Oz is a closer equivalent to GCC's -Os. I tried -Oz when compiling with clang and confirmed that the Clang's generated assembly is equivalent to GCC for the code snippet I posted above. clang --target=armv6m-none-eabi -Oz -fomit-frame-pointer memcpy_alt1: push {r4, lr} movs r3, #0 .LBB0_1: cmp
2016 May 10
2
RFC: metadata attachments for global variables
On Tue, May 10, 2016 at 3:03 PM, Adrian Prantl <aprantl at apple.com> wrote: > > On May 9, 2016, at 4:42 PM, Peter Collingbourne via llvm-dev < > llvm-dev at lists.llvm.org> wrote: > > > > On Mon, May 9, 2016 at 4:26 PM, David Blaikie <dblaikie at gmail.com> wrote: > >> >> >> On Mon, May 9, 2016 at 3:38 PM, Peter Collingbourne <peter
2019 Sep 10
2
Question on llvm.mem* intrinsics
Hi there lowering experts, Can the llvm.mem* intrinsics ever turn into a library call? Or do they invariably turn into inline code? This comes up because there was a patch to StackProtector to use CaptureTracking instead of a home-grown analysis, which changes the treatment of calls to intrinsics. (The old code treated them as normal calls, the new code decides intrinsics can never capture.)
2014 Jul 23
2
[LLVMdev] LowerINTRINSIC_W_CHAIN in X86
Yeah. I agree that "Chain operand is needed if the intrinsic is reading / writing memory.”, Just don’t know where and how to set it up. like intrinsic “int_x86_xtest: “ def int_x86_xtest : GCCBuiltin<"__builtin_ia32_xtest">, Intrinsic<[llvm_i32_ty], [], []>; “ "def X86xtest: SDNode<"X86ISD::XTEST", SDTypeProfile<1, 0,