similar to: [RFC] BasicAA considers address spaces?

On Fri, Aug 7, 2015 at 12:01 PM, Matt Arsenault <Matthew.Arsenault at amd.com> wrote: > On 08/07/2015 11:35 AM, Jingyue Wu wrote: > > + the new llvm-dev > > On Fri, Aug 7, 2015 at 11:30 AM, Jingyue Wu <jingyue at google.com> wrote: > >> Hi folks, >> >> Unsurprisingly, leveraging the fact that certain address spaces don't >> alias can

On Aug 7, 2015, at 8:28 PM, Hal Finkel <hfinkel at anl.gov<mailto:hfinkel at anl.gov>> wrote: ________________________________ From: "Jingyue Wu" <jingyue at google.com<mailto:jingyue at google.com>> To: "Matt Arsenault" <Matthew.Arsenault at amd.com<mailto:Matthew.Arsenault at amd.com>> Cc: llvm-dev at lists.llvm.org<mailto:llvm-dev at

----- Original Message ----- > From: "Daniel Berlin" <dberlin at dberlin.org> > To: "Jingyue Wu" <jingyue at google.com> > Cc: "Hal Finkel" <hfinkel at anl.gov>, llvm-dev at lists.llvm.org, "Justin Holewinski" <jholewinski at nvidia.com> > Sent: Wednesday, August 12, 2015 2:03:34 PM > Subject: Re: [llvm-dev] [RFC]

I was lost from the thread at some point. Making the interface more general sounds good to me. This helps to solve Escha's concern that targets can know more about aliasing than just comparing address spaces. If there are no objections, I'll 1) add a new interface to TTI such as isTriviallyDisjoint. It returns false by default. 2) create a new AA that checks this interface, and add it to

On 08/07/2015 06:13 PM, Hal Finkel wrote: > But you seem to be implying that you'll use different address spaces > at the IR level, but that these address spaces will be changed prior > to the target seeing them? Or that the target will internally map them > all to address space 0 (instead of aborting). If the target knows to > do this mapping, it can also understand the

Personally I feel the most intuitive approach would be to have an equivalent of isTriviallyDisjoint for IR; we already have a model for how it would work, and it could be a TTI call. I’ve kind of wanted this for a while because there’s a lot of address-space-esque aliasing relationships that can’t be easily modeled on the IR level. For example (in our model), we have some constraints like this:

On 08/07/2015 12:22 PM, Daniel Berlin via llvm-dev wrote: > Sorry to be pedantic, but i think it's important to make sure we are > all on the same page that backends can't change the aliasing behavior > of the default address space, only the aliasing behavior of the other > address spaces. Are you saying that we can't say address space 0 doesn't alias other address

----- Original Message ----- > From: "Jingyue Wu" <jingyue at google.com> > To: "songlh" <songlh at cs.wisc.edu>, llvmdev at cs.uiuc.edu > Sent: Wednesday, October 15, 2014 2:50:12 PM > Subject: Re: [LLVMdev] how to choose which alias analysis used in my pass? > > > Isn't -basicaa the default alias analysis already? No, -basicaa is added

Hi Escha, We certainly would love to generalize them as long as the performance doesn't suffer in general. If you have specific use cases that are regressed due to these optimizations, I am more than happy to take a look. On Mon, Aug 24, 2015 at 6:43 PM, escha <escha at apple.com> wrote: > > On Aug 24, 2015, at 11:10 AM, Jingyue Wu via llvm-dev < > llvm-dev at

Hi, As you may have noticed, since last year, we (Google's CUDA compiler team) have contributed quite a lot to the effort of optimizing LLVM for CUDA programs. I think it's worthwhile to write some docs to wrap them up for two reasons. 1) Whoever wants to understand or work on these optimizations has some detailed docs instead of just source code to refer to. 2) RFC on how to improve

On Tue, Mar 25, 2014 at 3:21 PM, Matt Arsenault <Matthew.Arsenault at amd.com>wrote: > On 03/25/2014 02:31 PM, Jingyue Wu wrote: > > > However, we have three concerns on this: > a) I doubt this optimization is valid for all targets, because LLVM > language reference ( > http://llvm.org/docs/LangRef.html#addrspacecast-to-instruction) says > addrspacecast "can be

Hi, I want to use memory dependence analysis in my pass, but I feel the default alias analysis is not precise enough. How could I choose to use another alias analysis algorithm? I have tried opt -load mypass.so -basicaa xx.bc > /dev/null. But I feel the alias analysis algorithm does not change. Do I need to add something in my codes? Thanks a lot! Best,

This is a follow-up discussion on http://lists.cs.uiuc.edu/pipermail/cfe-commits/Week-of-Mon-20140324/101899.html. The front-end change was already pushed in r204677, so we want to continue with the IR optimization. In general, we want to write an IR pass to convert generic address space usage to non-generic address space usage, because accessing the generic address space in CUDA and OpenCL is

Hi, I am an out-of-tree user of llvm. I am running into an regression issue against llvm 5.0. The issue was introduced by "[BasicAA] Use MayAlias instead of PartialAlias for fallback."( https://reviews.llvm.org/D34318) I have attached a very simple program to reproduce the issue. The symptom is alias analysis report NoAlias to GVN which cause GVN do wrong optimization. The BasicAA

Yes, all that is correct. My question is more a long term question: why do the .ll printer specify the alignment if it is equivalent to the default one? That is, it seems the sed script expect the printer to not specify it (this would match the load/store behavior), but the ll-printer does specify it, which either means the printer is not ideal on this case and I should fix it, or in this case

Thanks, that worked like a charm except for the following: llvm generate: call void @llvm.memcpy.p3i8.p1i8.i64(i8 addrspace(3)* align 1 bitcast ([512 x float] addrspace(3)* @a_scratchpad to i8 addrspace(3)*), i8 addrspace(1)* align 1 %0, i64 2048, i1 false) And we expected: call void @llvm.memcpy.p3i8.p1i8.i64(i8 addrspace(3)* bitcast ([512 x float] addrspace(3)* [[SPM0]] to i8

CostModule::getInstructionCost also consults TTI ( http://llvm.org/docs/doxygen/html/CostModel_8cpp_source.html#l00380). No? Jingyue On Wed, Jan 14, 2015 at 4:05 PM, Chandler Carruth <chandlerc at google.com> wrote: > > On Wed, Jan 14, 2015 at 3:54 PM, Jingyue Wu <jingyue at google.com> wrote: > >> I'm looking for APIs that compute instruction costs, and noticed

Good question. AFAIK, the IR-printer doesn’t understand the semantics of parameter attributes. In this case, it only knows that there is an attribute on the parameter that is integer valued (with value 1) and that has the name “align”, so it prints it out. If we don’t want it printing out ‘align 1’ then it’s up to us to not set the alignment parameter attribute to a value if that value would be 1.

Hi, I'm looking for APIs that compute instruction costs, and noticed several of them. 1. A series of APIs of TargetTransformInfo that compute the cost of instructions of a particular type (e.g. getArithmeticInstrCost and getShuffleCost) 2. TargetTransformInfo::getOperationCost 3. CostModel::getInstructionCost::getInstructionCost in lib/Analysis/CostModel.cpp Only the first one is used

Hi, I am observing some incorrect behavior in basicaa, wherein two pointers that basicaa should determine to be MustAlias are ending up NoAlias - the other extreme :( I am blaming this on basicaa not handling inttoptr. Here is the relevant IR snippet. -------------------- %sunkaddr36 = ptrtoint %struct.BitParams* %bs to i32 %sunkaddr37 = add i32 %sunkaddr36, 16 %sunkaddr38 = inttoptr i32