Displaying 20 results from an estimated 100000 matches similar to: "Creating a virtual machine: stack, regs alloc & other problems"
2015 Sep 04
3
LLVM as a back end for HHVM
On 9/4/15 1:12 AM, Sanjoy Das via llvm-dev wrote:
> Specifically on "Location records" --
>
> Is it legal for the optimizer to drop the `!locrec` metadata that you
> attach to instructions? The general convention in LLVM is that
> dropping metadata should not affect correctness, and if the location
> record information is not best-effort or optional then metadata is
2015 Aug 07
2
Creating a virtual machine: stack, regs alloc & other problems
Alex:
I'm not sure you're taking the right approach with this. You can either
have portability or you can play games with the calling convention assumed
by the back end, or you can modify the compiler to suit your desired
calling convention, but you probably can't get all three.
I'm the guy behind HDTrans (dynamic binrary translation for x86), and we
used direct x86 instruction
2019 Sep 18
2
Setting llvm::TargetOptions::GuaranteedTailCallOpt in LTO Code Generation
On Wed, Sep 18, 2019, 2:39 PM Steven Wu <stevenwu at apple.com> wrote:
>
>
> On Sep 18, 2019, at 10:24 AM, Steven Wu <stevenwu at apple.com> wrote:
>
> Hi Dwight
>
> Thanks for the feedback. For the issue you reported, there has been few
> reviews trying to tweak the -mllvm option when using legacy LTO interfaces
> (myself included) but it never got enough
2012 Mar 02
3
[LLVMdev] Stack alignment on X86 AVX seems incorrect
On Fri, Mar 2, 2012 at 11:32 AM, Evandro Menezes <emenezes at codeaurora.org>
wrote:
...
> Figure 3.3 on page 16 of www.x86-64.org/documentation/abi.pdf is not
> normative. See foot note 7 in the same page. Figure 3.4 on page 21
> confirms that the use of a frame-pointer is optional.
>
> So, if one doesn't use ENTER in the prologue and uses RSP to access local
>
2012 Mar 02
0
[LLVMdev] Stack alignment on X86 AVX seems incorrect
On Fri, Mar 02, 2012 at 11:58:29AM -0500, Cameron McInally wrote:
> On Fri, Mar 2, 2012 at 11:32 AM, Evandro Menezes <emenezes at codeaurora.org>
> wrote:
> ...
> > Figure 3.3 on page 16 of www.x86-64.org/documentation/abi.pdf is not
> > normative. See foot note 7 in the same page. Figure 3.4 on page 21
> > confirms that the use of a frame-pointer is optional.
[LLVMdev] PSA: Perfectly forwarding thunks can now be expressed in LLVM IR with musttail and varargs
2014 Sep 02
2
[LLVMdev] PSA: Perfectly forwarding thunks can now be expressed in LLVM IR with musttail and varargs
I needed this functionality to solve http://llvm.org/PR20653, but it
obviously has far more general applications.
You can do it like this:
define i32 @my_forwarding_thunk(i32 %arg1, i8* %arg2, ...) {
... ; define new_arg1 and new_arg2
%r = musttail call i32 (i32, i8*, ...)* @the_true_target(i32 %new_arg1,
i8* %new_arg2, ...)
ret i32 %r
}
declare i32 @the_true_target(i32, i8*, ...)
The
2018 Mar 02
1
is it allowed to use musttail on llvm.coro.resume?
It makes sense that you would be able to do this:
%save1 = llvm.coro.save()
%unused = musttail call llvm.coro.resume(%some_handle)
%x = llvm.coro.suspend()
...
But the docs for musttail say:
> The call must immediately precede a ret instruction, or a pointer bitcast
followed by a ret instruction.
Should this be amended to allow a musttail to be followed by
llvm.coro.suspend() ?
Regards,
2017 Jun 24
1
musttail & alwaysinline interaction
Consider this program:
@globalSideEffect = global i32 0
define void @tobeinlined() #0 {
entry:
store i32 3, i32* @globalSideEffect, align 4
musttail call fastcc void @tailcallee(i32 3)
ret void
}
define fastcc void @tailcallee(i32 %i) {
entry:
call void @tobeinlined()
ret void
}
attributes #0 = { alwaysinline }
Clearly, if this is processed with opt -alwaysinline, it will lead
[LLVMdev] PSA: Perfectly forwarding thunks can now be expressed in LLVM IR with musttail and varargs
2014 Oct 09
2
[LLVMdev] PSA: Perfectly forwarding thunks can now be expressed in LLVM IR with musttail and varargs
On 8 Oct 2014, at 18:19, Reid Kleckner <rnk at google.com> wrote:
> The one target I know about where varargs are passed differently from normal arguments is aarch64-apple-ios/macosx. After thinking a bit more, I think this forwarding thunk representation works fine even on that target. Typically a forwarding thunk is called indirectly, or at least through a bitcast, so the LLVM IR call
2007 Aug 16
3
[LLVMdev] Do explicitly managed stack frames free the stack register?
Just out of curiosity, now that explicitly managed stack frames [1]
are possible (given support in the code generators), is the stack
register freed for other uses when the LLVM system stack isn't being
used?
Sandro
[1] http://nondot.org/sabre/LLVMNotes/ExplicitlyManagedStackFrames.txt
2016 Nov 27
3
llvm optimizer turning musttail into tail
r287955 seems like it might be related.
-- Sean Silva
On Sat, Nov 26, 2016 at 4:06 PM, Sean Silva <chisophugis at gmail.com> wrote:
> This sounds buggy to me. What pass is doing this?
>
> -- Sean Silva
>
> On Thu, Nov 24, 2016 at 5:39 AM, Carlo Kok via llvm-dev <
> llvm-dev at lists.llvm.org> wrote:
>
>>
>> I've got some calls like:
>>
2019 May 06
2
RegAlloc Q: spill when implicit-def physreg is also the output reg of instruction
Hi LLVM,
I ran into a case where RegAlloc would insert a spill across instruction
that had same register for output operand and implicit-def. The effect
this had was that spill code would immediately overwrite the output
result. Is this the expected result of setting up MyInst this way? In
other words, does RegAlloc know to not insert spill in case it sees that
output reg is same as one of
2014 Apr 01
2
[LLVMdev] Proposal: Add a guaranteed tail call marker
Some frontends for LLVM require that LLVM perform tail call optimization
(TCO) for correctness. Internally, LLVM refers to TCO of a non-recursive
tail call as sibling call optimization, but I'm going to refer to that
generically as TCO. Often, functional languages like Scheme have a
language-level requirement that TCO occurs for any call in the tail
position, and this is usually why users of
2019 Sep 18
3
Setting llvm::TargetOptions::GuaranteedTailCallOpt in LTO Code Generation
Hi Dwight
Thanks for the feedback. For the issue you reported, there has been few reviews trying to tweak the -mllvm option when using legacy LTO interfaces (myself included) but it never got enough traction to moving forward. Note how -tailcallopt is implemented as a -mllvm flag means that it is a debug option and probably not well tested. The option is also not stable which means it can be
2020 Sep 09
2
spill to register not stack?
Given an architecture with two classes of registers: A is general purpose and
has an "adequate" number of registers, and C which is special purpose and has
very few (e.g. one) register. There are cheap instructions that directly copy
from C to A and vice versa.
If we need another C register and they are all live, we need to spill one.
Currently as far as I can tell, the only way to
2012 Mar 02
2
[LLVMdev] Stack alignment on X86 AVX seems incorrect
On Fri, Mar 02, 2012 at 12:18:19AM -0300, Bruno Cardoso Lopes wrote:
> Hi Elena,
>
> On Thu, Mar 1, 2012 at 8:28 PM, Demikhovsky, Elena
> <elena.demikhovsky at intel.com> wrote:
> > Even if you explicitly specify –stack-alignment=16 the aligned movs are
> > still generated.
> >
> > It is not an issue related to ABI.
>
> This looks like PR10841,
2016 Nov 24
3
llvm optimizer turning musttail into tail
I've got some calls like:
musttail call void bitcast (i32 (i32, i8*, %Type*)* @MyMethod to void
(i32, i8*)*)(i32 %0, i8* %1)
ret void
Into something like:
%8 = tail call i32 @MyMethod(i32 %0, i8* %1, %Type* null)
ret void
I realize I'm losing a parameter there, but this is an interface jump
trick I use and relies on the end code being a 'jmp' (x86). I realize i
can probably
2019 May 07
2
RegAlloc Q: spill when implicit-def physreg is also the output reg of instruction
Hi Quentin,
MyInst is a custom instruction that has implicit-defs of fixed
registers. The implicit-defs are seen at the end of Instruction Selection.
I'd like to add a report, but I am working on an out-of-tree backend
based on 7.0. I can try to help reduce the testcase down.
Filed https://bugs.llvm.org/show_bug.cgi?id=41790
Regards,
Kevin
On 2019-05-07 3:45 p.m., Quentin Colombet wrote:
2015 Aug 28
2
Aligned vector spills and variably sized stack frames
----- Original Message -----
> From: "Philip Reames via llvm-dev" <llvm-dev at lists.llvm.org>
> To: "llvm-dev" <llvm-dev at lists.llvm.org>
> Sent: Friday, August 28, 2015 6:21:00 PM
> Subject: Re: [llvm-dev] Aligned vector spills and variably sized stack frames
>
> On 08/28/2015 04:00 PM, Philip Reames via llvm-dev wrote:
> > I've run
2015 Sep 23
3
[PATCH] D12923: Add support for function attribute "notail"
On 09/23/2015 08:48 AM, Akira Hatanaka wrote:
> On Tue, Sep 22, 2015 at 8:31 AM, Philip Reames
> <listmail at philipreames.com <mailto:listmail at philipreames.com>> wrote:
>
> To be clear, this is a debuging aid only? It's not something
> required for correctness? I'm somewhat bothered by that because
> it seems like it would be a useful