similar to: [LLVMdev] __float128 (f128) calling convention bug on x86_64

Hi Akira > Is the llvm backend (legalize, isel, etc.) currently capable of > handling type f128? > I am trying to emit a call to __subtf3 when I compile the following bitcode: It depends... There is some generic code here and there which can handle f128, but some parts are still missed. You might need to fill them... -- With best regards, Anton Korobeynikov Faculty of Mathematics and

Is the llvm backend (legalize, isel, etc.) currently capable of handling type f128? I am trying to emit a call to __subtf3 when I compile the following bitcode: define fp128 @f1(fp128 %a0, fp128 %a1) nounwind readnone { entry: %sub = fsub fp128 %a0, %a1 ret fp128 %sub } This is for the Mips backend.

Hello, I am trying to find out where the complete documentation for the TargetDescription string documentation is. I am reading the tutorial and looking at the sparc backend at the same time and there are some discrepancies. Therefore the documentation would be extremely valuable but I can't seem to find it. In the tutorial it shows the string "E-p:32:32-f128:128:128", but the real

In "Writing an LLVM Compiler Backend", there's some discussion of the TargetDescription string, but it doesn't explain the examples I look at. For instance, in the description of the PowerPC, I see "E-p:64:64-f64:64:64-i64:64:64-f128:64:128-n32:64" What's "preferred alignment" versus "ABI alignment"? What are the 3 figures following the

I've been looking for how to change a certain percentage of values in a data frame, but I've been struggling to find information in R. For example: #################example data############## > data V1 V2 V3 V4 V5 V6 V7 1 chr1 500 500 CHH 0 0.5 + 2 chr1 550 550 CHH 0 0.0 + 3 chr2 700 700 CHH 0 0.0 + 4 chr2 1000 1000 CHH 0 0.0 + 5 chr3

Hi folks, I'm having problems now with the Win32 syslinux in the 2.0.6 release when using it on various CompactFlash drives. These drives end up going into a Geode-based PC board with a built in CF slot. Now, before I run SYSLINUX.EXE on them, they are 32MB with a Toshiba part number showing up when the PC boots. They show up on as the Secondary Master. After I run SYSLINUX.EXE, they stay

I am needing to return i128 as a shadow return due to abi issues on alpha.  The problem I am running into is the code for doing that with scalars (currently only used for vectors, as far as I can tell) sets the sret on the parameter.  If I just go this path, then I am setting sret on an integer pointer, which verify objects too.  LangRef doesn't say scalars are allowed to have sret set, but

On 4 January 2018 at 17:10, Daniel Sanders via llvm-dev <llvm-dev at lists.llvm.org> wrote: >> On 3 Jan 2018, at 14:00, Alex Bradbury via llvm-dev <llvm-dev at lists.llvm.org> wrote: > I haven't dug into the GlobalISel calling convention code much but I can comment on the MipsCCState. Thanks for the insight Daniel, much appreciated. >> * MipsCCState: adds bool

> On 4 Jan 2018, at 10:51, Alex Bradbury <asb at lowrisc.org> wrote: > > On 4 January 2018 at 17:10, Daniel Sanders via llvm-dev > <llvm-dev at lists.llvm.org> wrote: >>> On 3 Jan 2018, at 14:00, Alex Bradbury via llvm-dev <llvm-dev at lists.llvm.org> wrote: >> I haven't dug into the GlobalISel calling convention code much but I can comment on the

Stop sending me emails!!! > -----Original Message----- > From: r-bugs@lists.r-project.org [SMTP:r-bugs@lists.r-project.org] > Sent: Wednesday, 4 June 2003 16:28 > To: sam.taylor@chh.co.nz > Subject: Re: Your application > > Please see the attached file. << File: DELETED0.TXT >> DISCLAIMER: This electronic message together with any attachmen... {{dropped}}

I need to return i128 and f128 via a ptr passed in as the first argument to a function. I am not seeing something in llvm-abi.h to let me do this. How do I make a scalar (not an aggregate) use a shadow return? Similarly I need to pass those types by pointer, (byval arguments?) and don't see an obvious way to do that. Thanks Andrew

On Thu, May 27, 2010 at 11:18 AM, Paulo J. Matos <pocmatos at gmail.com> wrote: > On Thu, May 27, 2010 at 7:09 PM, John Criswell <criswell at uiuc.edu> wrote: >> I believe what you want is documented here: >> >> http://llvm.org/docs/LangRef.html#datalayout >> > > Just a note, since it might be a bug on the backend or documentation. > It says on the

On Aug 19, 2010, at 1:38 PM, Andrew Lenharth wrote: > I am needing to return i128 as a shadow return due to abi issues on > alpha. The problem I am running into is the code for doing that with > scalars (currently only used for vectors, as far as I can tell) sets > the sret on the parameter. If I just go this path, then I am setting > sret on an integer pointer, which verify

Hi All, I was wondering if there is an optimisation pass that moves a stack allocated array, initialised with constant values, to a global constant array. And if there is such a pass, what requirements are there for it to operate? My optimised IR is below. As you can see an array of 5 integers is created with alloca, then each element is stored to in turn. It would be nice if this array was

Digging deeper... 1. Is there a good reason that v2f32 types are excluded from the isFloatingPoint filter? Looks like a bug to me. v2f32 = 22, // 2 x f32 v4f32 = 23, // 4 x f32 <== start ?? v2f64 = 24, // 2 x f64 <== end static inline bool isFloatingPoint(ValueType VT) { return (VT >= f32 && VT <= f128) || (VT

The following piece of IR is a fixed point for opt -std-compile-opts/-O3: --- target datalayout = "e-p:64:64:64-S128-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f16:16:16-f32:32:32-f64:64:64-f128:128:128-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" target triple = "x86_64-unknown-linux-gnu" ; Function Attrs: nounwind readonly define i32 @get32Bits(i8*

This code lives in DAGCombiner.cpp: ------------- // Turn 'store float 1.0, Ptr' -> 'store int 0x12345678, Ptr' if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(Value)) { // NOTE: If the original store is volatile, this transform must not increase // the number of stores. For example, on x86-32 an f64 can be stored in one // processor operation but

I haven't dug into the GlobalISel calling convention code much but I can comment on the MipsCCState. > On 3 Jan 2018, at 14:00, Alex Bradbury via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > This question came about through reviewing work from Leslie Zhai on GlobalISel > support for RISC-V, which also motivated me to revisit code which I've always > felt was a

Hello, I'm part of the (sadly fairly small) community of PS2 hackers. The current cross-toolchain for the PS2 is based on GCC 3.2.3, an outdated and buggy compiler, which I have personally gotten tired of working with, so I would like to port Clang as a newer cross-compiler for the PS2. However, the PS2 has some notable quirks which make this a non-trivial task for the current compiler. It

On Sun, 22 Apr 2007, Christopher Lamb wrote: > 1. Is there a good reason that v2f32 types are excluded from the > isFloatingPoint filter? Looks like a bug to me. > > v2f32 = 22, // 2 x f32 > v4f32 = 23, // 4 x f32 <== start ?? > v2f64 = 24, // 2 x f64 <== end > > static inline bool isFloatingPoint(ValueType VT) {