Displaying 20 results from an estimated 700 matches similar to: "[LLVMdev] TableGen question"
2012 Jul 24
2
[LLVMdev] Instruction Encodings in TableGen
On Tue, Jul 24, 2012 at 3:59 PM, Tom Stellard <thomas.stellard at amd.com>wrote:
> On Tue, Jul 24, 2012 at 03:25:14PM -0400, Justin Holewinski wrote:
> > I'm starting to look into binary instruction encodings in TableGen, and
> I'm
> > a bit confused on how the instruction fields are populated. Perhaps I'm
> > just being dense, but I cannot see how SDAG
2012 Jul 24
2
[LLVMdev] Instruction Encodings in TableGen
I'm starting to look into binary instruction encodings in TableGen, and I'm
a bit confused on how the instruction fields are populated. Perhaps I'm
just being dense, but I cannot see how SDAG operands are translated into
the encoding fields. Can someone please explain the following snippet from
the PPC back-end.
The AND instruction in PPC is defined as:
1011 def AND :
2012 Jul 25
2
[LLVMdev] Instruction Encodings in TableGen
On Tue, Jul 24, 2012 at 8:46 PM, Jim Grosbach <grosbach at apple.com> wrote:
>
> On Jul 24, 2012, at 3:52 PM, Justin Holewinski <
> justin.holewinski at gmail.com> wrote:
>
> On Tue, Jul 24, 2012 at 3:59 PM, Tom Stellard <thomas.stellard at amd.com>wrote:
>
>> On Tue, Jul 24, 2012 at 03:25:14PM -0400, Justin Holewinski wrote:
>> > I'm
2012 Jul 24
0
[LLVMdev] Instruction Encodings in TableGen
On Tue, Jul 24, 2012 at 03:25:14PM -0400, Justin Holewinski wrote:
> I'm starting to look into binary instruction encodings in TableGen, and I'm
> a bit confused on how the instruction fields are populated. Perhaps I'm
> just being dense, but I cannot see how SDAG operands are translated into
> the encoding fields. Can someone please explain the following snippet from
2012 Jul 25
0
[LLVMdev] Instruction Encodings in TableGen
On Jul 24, 2012, at 3:52 PM, Justin Holewinski <justin.holewinski at gmail.com> wrote:
> On Tue, Jul 24, 2012 at 3:59 PM, Tom Stellard <thomas.stellard at amd.com> wrote:
> On Tue, Jul 24, 2012 at 03:25:14PM -0400, Justin Holewinski wrote:
> > I'm starting to look into binary instruction encodings in TableGen, and I'm
> > a bit confused on how the instruction
2012 Jul 27
0
[LLVMdev] Instruction Encodings in TableGen
On Wed, 25 Jul 2012 07:51:28 -0400
Justin Holewinski <justin.holewinski at gmail.com> wrote:
> On Tue, Jul 24, 2012 at 8:46 PM, Jim Grosbach <grosbach at apple.com>
> wrote:
>
> >
> > On Jul 24, 2012, at 3:52 PM, Justin Holewinski <
> > justin.holewinski at gmail.com> wrote:
> >
> > On Tue, Jul 24, 2012 at 3:59 PM, Tom Stellard
> >
2008 Aug 22
3
[LLVMdev] Implementing llvm.memory.barrier on PowerPC
No, I don't.
Cheers,
Gary
Dale Johannesen wrote:
> This looks OK to check in, do you have write access?
>
> On Aug 21, 2008, at 6:38 AMPDT, Gary Benson wrote:
>
> >Dale Johannesen wrote:
> >>On Aug 19, 2008, at 7:18 AMPDT, Gary Benson wrote:
> >>>I'm trying to implement llvm.memory.barrier on PowerPC. I've
> >>>modelled my patch
2008 Aug 21
2
[LLVMdev] Implementing llvm.memory.barrier on PowerPC
Dale Johannesen wrote:
> On Aug 19, 2008, at 7:18 AMPDT, Gary Benson wrote:
> > I'm trying to implement llvm.memory.barrier on PowerPC. I've
> > modelled my patch (attached) on the implementation in X86, but
> > when I try and compile my test file (also attached) with llc I
> > get the error "Cannot yet select: 0x10fa4ad0: ch = MemBarrier
> >
2008 Aug 21
0
[LLVMdev] Implementing llvm.memory.barrier on PowerPC
On Aug 19, 2008, at 7:18 AMPDT, Gary Benson wrote:
> Hi all,
>
> I'm trying to implement llvm.memory.barrier on PowerPC. I've modelled
> my patch (attached) on the implementation in X86, but when I try and
> compile my test file (also attached) with llc I get the error "Cannot
> yet select: 0x10fa4ad0: ch = MemBarrier 0x10fa4828, 0x10fa4c68,
> 0x10fa4be0,
2008 Aug 21
0
[LLVMdev] Implementing llvm.memory.barrier on PowerPC
This looks OK to check in, do you have write access?
On Aug 21, 2008, at 6:38 AMPDT, Gary Benson wrote:
> Dale Johannesen wrote:
>> On Aug 19, 2008, at 7:18 AMPDT, Gary Benson wrote:
>>> I'm trying to implement llvm.memory.barrier on PowerPC. I've
>>> modelled my patch (attached) on the implementation in X86, but
>>> when I try and compile my test
2008 Aug 19
2
[LLVMdev] Implementing llvm.memory.barrier on PowerPC
Hi all,
I'm trying to implement llvm.memory.barrier on PowerPC. I've modelled
my patch (attached) on the implementation in X86, but when I try and
compile my test file (also attached) with llc I get the error "Cannot
yet select: 0x10fa4ad0: ch = MemBarrier 0x10fa4828, 0x10fa4c68,
0x10fa4be0, 0x10fa4be0, 0x10fa4be0, 0x10fa4be0". This presumably
means my "membarrier"
2006 Jan 13
1
R and filemaker pro DB
I have been looking for a database application to use in conjunction with R (on
a Windows network). When I approached my organization's IT department to ask
about using MySQL, they made a counter-offer of Filemaker Pro (v8). It is not
specifically mentioned in 'R Data Import/Export', nor do searches of the
archives turn up much information.
Does anyone have any experience using
2007 Dec 06
1
HTML help search in R 2.6.0 v 2.6.1
I am running R on a corporate Windows XP SP2 machine on which I do not
have
administrator privileges or access to most settings in Control Panel.
R is
installed from my limited user account. The version of the JVM I have
installed is perhaps best described as antique:
> system(paste("java -version"),show.output.on.console=T)
java version "1.4.1"
Java(TM) 2 Runtime
2004 Aug 30
1
Rcmdr X11 protocol error message
I am using R 1.9.1 with R Commander GUI under Windows at work, and under Linux Mandrake 10 OR at home. I am having no problems running R Commander under windows. Under Linux, though, the opening and sometimes closing of windows from R Commander produces identical and repetitive error messages (in dialogue boxes and mirrored in the console):
>"Warning: X11 protocol error: BadWindow
2019 Sep 25
2
Help with RISCV and QEMU in llvm testsuite lit testing
Hi,
I am not sure if this is the right forum. Please direct me to the
appropriate place if it isn't so.
Please keep in CC as i am not subscribed to this mailing list.
I am trying to test riscv llvm tools in QEMU using llvm testsuite. As a
trial i am trying only the Single Source C Regression folder. The steps
that i took are :
]$ cmake -DCMAKE_C_COMPILER=/opt/riscv-tools/bin/clang
2014 Mar 13
2
[LLVMdev] Be Careful with Positionally-Encoded Operands (AArch64, Mips, AMDGPU, etc.)
----- Original Message -----
> From: "Tom Stellard" <tom at stellard.net>
> To: "Hal Finkel" <hfinkel at anl.gov>
> Cc: "LLVM Developers Mailing List" <llvmdev at cs.uiuc.edu>
> Sent: Thursday, March 13, 2014 9:46:22 AM
> Subject: Re: [LLVMdev] Be Careful with Positionally-Encoded Operands (AArch64, Mips, AMDGPU, etc.)
>
> On
2014 Mar 13
5
[LLVMdev] Be Careful with Positionally-Encoded Operands (AArch64, Mips, AMDGPU, etc.)
Hello,
Some of the backends seem to be combining positional and named operands when defining some instructions such that some of the positional operands overlap with some of the named operands. I suspect this is not intentional; here's an example:
AArch64 has the following instruction definition:
SMULHxxx {
field bits<32> Inst = { 1, 0, 0, 1, 1, 0, 1, 1, 0, 1, 0, Rm{4}, Rm{3},
2018 Mar 13
1
Profiling Support for BareMetal Target
Hi,
I followed two posts as my guideline
http://lists.llvm.org/pipermail/llvm-dev/2017-September/117339.html and
http://lists.llvm.org/pipermail/llvm-dev/2017-September/117156.html
I am using clang 4.0.1 and compiler-rt 4.0 release
1. I made changes in the LCF to mimic Linux Platform (for linker magic)
In data section i have added:
__start___llvm_prf_cnts = .;
2010 Oct 18
4
[LLVMdev] PowerPC : Assertion `MovePCtoLROffset && "MovePCtoLR not seen yet?"' failed.
Hi all,
I'm compiling current SVN HEAD on Linux/x86. The tests are failing
on PowerPC due to the following assertion failure :
JITTests: PPCCodeEmitter.cpp:152: unsigned int<unnamed>::PPCCodeEmitter::
getMachineOpValue(const llvm::MachineInstr&, const llvm::MachineOperand&)
const: Assertion `MovePCtoLROffset && "MovePCtoLR not seen yet?"'
2012 Apr 12
3
Reading SPSS: underlying numerical codes
Dear people,
I have got a question concerning the underlying numerical codes when
reading an SPSS file into R.
I used the package foreign and when I look at a variable I get the verbal
codes.
I would like to know how it is possible to get the underlying numerical
codes as output, which are the same as in my SPSS file.
Thank you very much in advance for your help!
Marion
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