Displaying 20 results from an estimated 1000 matches similar to: "[LLVMdev] [GSoc] Liveness Based Flow Sensitive Pointer Analysis for GSoc 2015"
2019 May 13
2
Is it possible to reproduce the result of opt -O3 manually?
I think this has to do with how the pass manager is populated when we give
-O3 vs when we give particular pass names.
Some passes have multiple createXYZPass() methods that accept arguments
too. These methods call non-default pass constructors, which in turn cause
the passes to behave in a different manner.
eg:
Pass *llvm::createLICMPass() { return new LegacyLICMPass(); }
Pass
2018 Aug 09
3
Legacy Loop Pass Manager question
Hi,
If we add multiple loop passes to the pass manager in
PassManagerBuilder.cpp consecutively without any func/module pass in
between, I used to think they would belong to the same loop pass manager.
But it does not seem to be the case.
For example for this code snippet
PM.add(createIndVarSimplifyPass()); // Canonicalize indvars
MPM.add(createLoopIdiomPass()); //
2019 Jan 19
2
What does "preds" mean in a .ll file?
Hi,
I see things like this. What does it mean? Is it documented somewhere? Thanks.
; preds = %for.body
https://llvm.org/docs/LangRef.html
; <label>:91: ; preds = %88
%92 = load i8**, i8*** @glob_complete_word.matches, align 8, !dbg !99798
%93 = load i32, i32* @glob_complete_word.ind, align 4, !dbg !99799
%94 = sext i32 %93 to i64, !dbg !99798
2014 Dec 07
2
[LLVMdev] Interest in LLVM
Hello everyone,
My name is Pratik Bhatu, I am a bachelor student currently studying at IIT Hyderabad, India.
I just finished my Compilers course have been exploring LLVM since the past month (kaleidoscope, writing LLVM passes) and am interested in the llvm-polly project. I am also a potential GSoC applicant and wanted to start working on the project from now. Is there a way I can
2016 Aug 30
2
Tablegen pattern matching question
Hi all,
I want to match addition with 16bit integers. So I define a pattern
fragment as follows:
def simm16 : PatLeaf<(imm), [{ return isInt<16>(N->getSExtValue()); }]>;
Now I am confused between
(add R32:$dst, simm16:$im) and
(add R32:$dst, (i32 simm16:$im)).
Do both of them match the same pattern? Are they equivalent? If not what is
the difference?
I am also confused as to how
2018 Feb 06
0
What does a dead register mean?
You are right about your interpretation of "dead". The case here is that
RSP is a reserved register and so its liveness isn't really tracked. The
"implicit-def dead" is an idiom used to mean that the register (reserved
or not) is clobbered. The other implicit uses/defs can come from
instruction definitions to indicate that this instruction uses and/or
modifies a given
2018 Feb 06
3
What does a dead register mean?
Hi,
My understanding of a "dead" register is a def that is never used. However,
when I dump the MI after reg alloc on a simple program I see the following
sequence:
ADJCALLSTACKDOWN64 0, 0, 0, *implicit-def dead %rsp*, implicit-def dead
%eflags, implicit-def dead %ssp, implicit %rsp, implicit %ssp
CALL64pcrel32 @foo, <regmask %bh %bl %bp %bpl %bx %ebp %ebx %rbp %rbx %r12
%r13 %r14
2013 Jan 03
8
How to Install Ruby and Rails
I want to install Ruby 1.8.7 and Rails 2.8.3,i am using ubuntu 11. Thank
you
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2015 Mar 10
2
[LLVMdev] GVN PRE algorithms in LLVM
The GVN algorithm used in LLVM currently (I'm rewriting it) is the basic
hash based RPO algorithm.
The new one i'm writing is based on http://dl.acm.org/citation.cfm?id=512536
(see https://github.com/dberlin/llvm-gvn-rewrite)
LLVM has different algorithms for both scalar PRE and load PRE.
They are basically variants of standard PRE algorithms transformed into
SSA, but with some
2019 Aug 08
3
[LLVM] (RFC) Addition/Support of new Vectorization Pragmas in LLVM
On 8/8/19 2:03 PM, Hal Finkel wrote:
Hi,
First, as a high-level note, you posted a link to a Google doc, and at the end of the Google doc, you have a list of questions that you'd like answered. In the future, please put the questions directly in the email. For one thing, more people will read your email than will open your Google doc. Second, having the questions in the email should allow a
2019 Aug 08
4
[LLVM] (RFC) Addition/Support of new Vectorization Pragmas in LLVM
Hello all,
We are students from Indian Institute of Technology(IIT), Hyderabad, we
would like to propose the addition of the following pragmas in LLVM that
aide in (or possibly increase the scope of) vectorization in LLVM (in
comparison with other compilers).
1.
ivdep
2.
Nontemporal
3.
[no]vecremainder
4.
[no]mask_readwrite
5.
[un]aligned
Could you please
2019 Aug 09
3
[LLVM] (RFC) Addition/Support of new Vectorization Pragmas in LLVM
> There is a fundamental problem with the way that ivdep is defined by
Intel's current documentation, at least for C/C++. As you note in your
Google doc, it essentially says that the optimizer may ignore loop-carried
dependencies except for those dependencies it can definitely prove are
present. These are not semantics that any other compiler can actually
replicate, and is not equivalent to
2017 Sep 04
2
llvm-dev Digest, Vol 159, Issue 2
Hal, Tobias, et al. –
I am strongly in favor of seeing a broader range of loop transformations, supported by strong dependence analysis, added to LLVM, and the Polly infrastructure seems to be by far our best bet to make that happen. I have a couple of questions:
1) Integer constraint libraries like ISL (and Omega, which I used extensively in a previous project) are fundamentally solving
2017 Dec 26
3
Why is remalloc not marked as noalias?
Hello,
According to my understanding, it seems that the result of realloc will not
technically alias the original pointer. When the realloc is done in-place
the reference <http://en.cppreference.com/w/c/memory/realloc> says:
"The original pointer ptr is invalidated and any access to it is undefined
behavior (even if reallocation was in-place)."
Additionally from the C11 standard
2016 Oct 10
2
On Loop Distribution pass
> On Oct 10, 2016, at 2:50 PM, Hal Finkel <hfinkel at anl.gov> wrote:
>
>
> From: "Dangeti Tharun kumar via llvm-dev" <llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org>>
> To: llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org>
> Cc: "Santanu Das" <cs15mtech11018 at iith.ac.in <mailto:cs15mtech11018 at
2015 Mar 23
2
[LLVMdev] Mails from IITH marked as spam
Dear Admin,
It seems that mails from our iit.ac.in domain are being marked as spam. It
would be nice if something could be done about this.
Best Regards
Ramakrishna
On Tue, Mar 24, 2015 at 1:12 AM, Aditya Kamath <
adityakamath+llvmdev at gmail.com> wrote:
> Hi all,
>
> (I received many emails that my posts were marked spam, so I am re-sending
> this from another email address
2016 Oct 09
3
On Loop Distribution pass
Dear community,
Our team at IITH have been experimenting with loop-distribution pass in
LLVM. We see the following results on few benchmarks.
clang -O3 -mllvm -enable-loop-distribute -Rpass=loop-distribute file.c
clang -O3 -mllvm -enable-loop-distribute -Rpass-analysis=loop-distribute
file.c
TORCH
2019 Sep 27
3
Question on target-features
Ugh, that would be a “yes” then…
--
Krzysztof Parzyszek kparzysz at quicinc.com<mailto:kparzysz at quicinc.com> AI tools development
From: llvm-dev <llvm-dev-bounces at lists.llvm.org> On Behalf Of Krzysztof Parzyszek via llvm-dev
Sent: Friday, September 27, 2019 10:05 AM
To: Dangeti Tharun kumar <cs15mtech11002 at iith.ac.in>; llvm-dev at lists.llvm.org
Subject: [EXT] Re:
2015 Mar 09
2
[LLVMdev] GVN PRE algorithms in LLVM
Hello everyone
I am Rakshit Singla, a third year undergrad at IIT Hyderabad, India. I
finished a basic compilers course last semester and am currently doing a
compiler optimizations course. I have been exploring LLVM for the past few
months (wrote a front-end for the Classroom Object Oriented Language and
have been studying pieces of code.) I would like to work with LLVM and
contribute to the
2006 Jun 19
9
Railsday 2006
Can you guys post a demo of your application ?
Would be great.
Thanks,
Pratik
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