similar to: [LLVMdev] A question to LLVM for ARMv6

Displaying 20 results from an estimated 2000 matches similar to: "[LLVMdev] A question to LLVM for ARMv6"

2017 Oct 31
3
Cross compiling for Baremetal ARM without using GCC
Dear LLVM developers, Hello, I'm trying to find a way of cross-compiling my c code against Baremetal Cortex-M device (so target triple will be arm-none-eabi) only using LLVM/Clang, and not using anything from GNU (ld or libc). I'm doing this to know which one of LLVM/clang and GCC produces smaller flash image size because saving flash is a big deal in our projects. 1) When I just follow
2013 Oct 11
3
[LLVMdev] Generate code for ARM Cortex m0, m3, and m4.
Hi, I am trying to cross compile code for ARM Cortex m0, m3, and m4. For m0, I use: -target armv6--eabi -mcpu=cortex-m0 That seems to work. For m3 and m4, I use the following which does not work (fatal error: error in backend: CPU: 'cortex-m3' does not support ARM mode): -target armv7m--eabi -mcpu=cortex-m3 and -target armv7em--eabi -mcpu=cortex-m4 Who can help me with the
2015 Mar 30
2
[LLVMdev] About Compiler-RT
Hi, all I used Clang to compile an ARM-v6m project. The runtime library is from GNU-ARM. But as I used 'memcpy' function, an error 'undefined reference to `__aeabi_memcpy' was emitted by linker. Does it mean that I must use LLVM compiler-RT instead? Thanks a lot. -------------- Steven ***************************** Legal Disclaimer ***************************** "This email
2017 Nov 10
5
[RFC] Enable Partial Inliner by default
Hi Graham, Thank you for offering help. I am trying to create a reproducer. The problem is that the crashes happen whilst LTO is used. One thing I am sure about IR is broken at compile time. Thanks, Evgeny From: Graham Yiu <gyiu at ca.ibm.com> Date: Friday, 10 November 2017 at 16:09 To: Evgeny Astigeevich <Evgeny.Astigeevich at arm.com> Cc: "junbuml at codeaurora.org"
2017 Nov 02
13
[RFC] Enable Partial Inliner by default
Forgot to add that all experiments were done with '-O3 -m64 -fexperimental-new-pass-manager'. Graham Yiu LLVM Compiler Development IBM Toronto Software Lab Office: (905) 413-4077 C2-707/8200/Markham Email: gyiu at ca.ibm.com From: Graham Yiu/Toronto/IBM To: llvm-dev at lists.llvm.org Cc: junbuml at codeaurora.org, xinliangli at gmail.com Date: 11/02/2017 05:26 PM Subject: [RFC]
2017 Nov 10
0
[RFC] Enable Partial Inliner by default
Hi Evgeny, I just realized that if these are compile-time errors I can help investigate on my end. Do you have something I can use to reproduce? Cheers, Graham Yiu LLVM Compiler Development IBM Toronto Software Lab Office: (905) 413-4077 C2-707/8200/Markham Email: gyiu at ca.ibm.com From: Graham Yiu/Toronto/IBM To: Evgeny Astigeevich <Evgeny.Astigeevich at arm.com> Cc:
2013 Oct 12
0
[LLVMdev] Generate code for ARM Cortex m0, m3, and m4.
Hi Jan, For Cortex-M0, you should probably use the armv6m string in the target triple. For M3 and M4 you need to use the thumbv7m arch string, -mthumb won't be necessary. Amara On 11 October 2013 19:23, Jan Hoogerbrugge < jan.hoogerbrugge at biface-tools.com> wrote: > Hi, > > I am trying to cross compile code for ARM Cortex m0, m3, and m4. > > For m0, I use: > >
2020 Jul 21
2
[ARM] Should Use Load and Store with Register Offset
Hello Sjoerd, Thank you for your response! I was not aware that -Oz is a closer equivalent to GCC's -Os. I tried -Oz when compiling with clang and confirmed that the Clang's generated assembly is equivalent to GCC for the code snippet I posted above. clang --target=armv6m-none-eabi -Oz -fomit-frame-pointer memcpy_alt1: push {r4, lr} movs r3, #0 .LBB0_1: cmp
2013 Oct 12
2
[LLVMdev] Generate code for ARM Cortex m0, m3, and m4.
On 12 October 2013 23:00, Amara Emerson <amara.emerson at gmail.com> wrote: > Hi Jan, > > For Cortex-M0, you should probably use the armv6m string in the target > triple. For M3 and M4 you need to use the thumbv7m arch string, -mthumb > won't be necessary. > Yes, but I agree with Jim that a bug must be filled. Jan, would you mind filling a bug?
2015 Jan 10
2
[LLVMdev] LTO support on Mac
Hi, I'm building LLVM on Mac OS 10.10 and I'm having trouble making LTO work. The system linker dumps the following information when I executed "ld -v" @(#)PROGRAM:ld PROJECT:ld64-241.9 configured to support archs: armv6 armv7 armv7s arm64 i386 x86_64 x86_64h armv6m armv7m armv7em LTO support using: LLVM version 3.4.2 which tells me that it is correctly pointing to the LLVM
2015 Jan 12
2
[LLVMdev] LTO support on Mac
On Jan 12, 2015, at 2:45 PM, Rafael EspĂ­ndola <rafael.espindola at gmail.com> wrote: > On 10 January 2015 at 17:43, Rahman Lavaee <r.lavaee at gmail.com> wrote: >> Hi, >> I'm building LLVM on Mac OS 10.10 and I'm having trouble making LTO work. >> The system linker dumps the following information when I executed "ld -v" >> >>
2020 Jul 20
2
[ARM] Should Use Load and Store with Register Offset
Hello LLVM Community (specifically anyone working with ARM Cortex-M), While trying to compile the Newlib C library I found that Clang10 was generating slightly larger binaries than the libc from the prebuilt gcc-arm-none-eabi toolchain. I looked at a few specific functions (memcpy, strcpy, etc.) and noticed that LLVM does not tend to generate load/store instructions with a register offset (e.g.
2013 Oct 14
0
[LLVMdev] Generate code for ARM Cortex m0, m3, and m4.
I've got a trivial fix for this problem, and another one which manifests when thumb is given without an explicit CPU. I'll start pushing it through our submissions process. On Saturday, 12 October 2013, Renato Golin wrote: > On 12 October 2013 23:00, Amara Emerson <amara.emerson at gmail.com<javascript:_e({}, 'cvml', 'amara.emerson at gmail.com');> > >
2013 Oct 14
1
[LLVMdev] Generate code for ARM Cortex m0, m3, and m4.
Thanks Bernie, Feel free to assign yourself to the bug report, just so we know someone is working on it. cheers, -renato On 14 October 2013 17:38, Bernard Ogden <bogden.dev at gmail.com> wrote: > I've got a trivial fix for this problem, and another one which manifests > when thumb is given without an explicit CPU. I'll start pushing it through > our submissions process.
2019 Mar 11
2
Compiling for baremetal ARMv4 on Ubuntu Linux
Hello Christian, I reran my script with a similar cmake command to yours. After the build finished the following command from the build directory gave me: find . -name \*builtins.a ./lib/clang/9.0.0/armv6m-none-eabi/lib/libclang_rt.builtins.a ./lib/clang/9.0.0/armv7m-none-eabi/lib/libclang_rt.builtins.a ./lib/clang/9.0.0/armv7em-none-eabi/lib/libclang_rt.builtins.a I hope you see something like
2019 Mar 04
2
Compiling for baremetal ARMv4 on Ubuntu Linux
Hello Christian, I'd expect that adding the library paths (-L) from gcc -v should fix the unable to find -lc, -lm but it won't fix the -lclang_rt.builtins-armv6m.a . To get clang_rt.builtins-armv6m.a you will need to cross compile compiler-rt for v6m and copy it to /usr/local/myclang/lib/clang/8.0.0/lib/baremetal . Beware that building compiler-rt for v6m does need quite a bit of fighting
2015 Sep 25
2
Error compiling libc++ for ARMv6
Hi, I was compiling libc++ with a recent TOT (248571) and when I got to the ARMv6, I got a code generation error in memory.cpp: fatal error: error in backend: Cannot select: intrinsic %llvm.arm.clrex ecc: error: clang frontend command failed with exit code 70 (use -v to see invocation) clang version 3.8.0 (trunk) It looks as if the newly added emitAtomicCmpXchgNoStoreLLBalance() function is
2019 Feb 04
2
Compiling for baremetal ARMv4 on Ubuntu Linux
Hello Christian, I've put some comments inline, On Sun, 3 Feb 2019 at 13:11, Christian Richter <christian.richter at hsu-hh.de> wrote: > > Hello again, > > so after I successfully build the compiler-rt for armv6 I tried to > actually use it in compiling a small helloworld for a baremetal arm > (consisting of barehelloCLANG.c and a small io.h + io.c) , but the >
2009 Feb 02
1
Speex for armv6
Hello, I am trying to build a speex library file for armv6 on intel MAC OS. I've also put -enable-arm5e-asm whether arm5e-asm works or not. ./configure -prefix=/Users/mijin/temp -disable-shared -enable-static - enable-fixed-point -enable-arm5e-asm This gives below errors. gcc -DHAVE_CONFIG_H -I. -I. -I.. -I../include -I../include -I.. -g - O2 -fvisibility=hidden -MT cb_search.lo -MD
2015 Sep 26
2
Error compiling libc++ for ARMv6
On Fri, Sep 25, 2015 at 2:17 PM, JF Bastien <jfb at google.com> wrote: > Looks like this was caused by r248294. Author CC'ed. > > On Fri, Sep 25, 2015 at 1:46 PM, Richard Pennington via llvm-dev > <llvm-dev at lists.llvm.org> wrote: >> >> Hi, >> >> I was compiling libc++ with a recent TOT (248571) and when I got to the >> ARMv6, I got a