similar to: [LLVMdev] [3.6 Release] no git branches?

The 3.6 release is drawing nearer, but the release notes could still use a lot of improvement: LLVM: https://github.com/llvm-mirror/llvm/blob/release_36/docs/ReleaseNotes.rst Clang: https://github.com/llvm-mirror/clang/blob/release_36/docs/ReleaseNotes.rst The good news is that they can be updated all the way up until release. If you have a patch for the release notes, commit it directly to the

Hi, is it possible to have appropriate tags for the Git repositories @ github? I see a Git branch "release_36", but what has v3.6.0rc2 for a commit-id, can you tags that? No, there are no tags at all @ github. Can you add in your announces a svn-trunk revision next time (for rc3)? Somehow it should be clear what is "rc2". Thanks. Regards, - Sedat -

Hi Anton, It seems that some release branches (e.g. release_30, release_35, and release_36) are missing from the Git mirror for libc++abi. May you help to fix the problem? Thanks. Sincerely, Logan -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20150201/68faf5d4/attachment.html>

On Mon, Feb 9, 2015 at 9:47 PM, Anton Korobeynikov <anton at korobeynikov.info> wrote: > Hans, > >>> I see a Git branch "release_36", but what has v3.6.0rc2 for a >>> commit-id, can you tags that? >>> No, there are no tags at all @ github. >> >> Anton, is it possible to translate the svn tags to git tags? > In the past we had problems

I.e., I see this when I run `git fetch`: ``` $ git fetch -v llvm.org From http://llvm.org/git/llvm = [up to date] master -> llvm.org/master = [up to date] release_1 -> llvm.org/release_1 = [up to date] release_16 -> llvm.org/release_16 = [up to date] release_20 -> llvm.org/release_20 = [up to date] release_21 -> llvm.org/release_21 = [up to date]

Hi Hans, I have attached a unit test which demonstrates a hang/infinite loop with the opt built with release_36 sources. The fixes are already pushed to "master" branch. The revisions r226588 and r226616 should be pushed to release_36 to fix the unit test. --Sumanth G -------------- next part -------------- An HTML attachment was scrubbed... URL:

> On 2016-Feb-05, at 15:22, James Y Knight <jyknight at google.com> wrote: > > That usually happens when someone deletes and then recreates an svn branch with the same name, as happened in r215001 and r215011. > It can be deleted now, if anyone wants to. ``` $ git push llvm.org :release_35 at 215010 fatal: unable to access 'http://llvm.org/git/llvm.git/': The requested

> In conclusion: > Why are people using Git disadvantaged? Short answer: because of git-svn and differences between what is a tag in git and svn. Long answer: git-svn never created proper git tags. Instead, it converted svn tags to branches (because technically branches and tags are same in svn). These branches were orphan and not usable for bunch of things (I believe Takumi can provide a

Essentially it doesn't appear that the reg class assignment is based on uses and is instead inserting an extra COPY for this. Is this accurate? If so, why? In this above example, I'm getting an extra "mov %r0, $b1" (this is an MI::COPY) even though "mov @a, %b1" (this is an MI::MOV) is entirely acceptable since both GPRRegs and BaseRegs are in the reg class list.. If

It seems the problem arises from using multiple reg classes for one MI in the td file, I guess. I'm not sure it takes first available, if I swap the reg classes in the list it does not change and if I replace the GPR reg class with something different than it picks the base reg class fine, potentially it is using the reg class with most available? idk. I just need to create MIs for every

Done: http://llvm.org/viewvc/llvm-project/cfe/branches/release_36/docs/ReleaseNotes.rst?view=markup#l113 We've been technically able to self-host for a some time, but now it's simple as 'CC=clang-cl CXX=clang-cl cmake'. =D On Wed, Feb 25, 2015 at 3:00 PM, Rafael Espíndola < rafael.espindola at gmail.com> wrote: > Nice. This should probably go to on the release notes :-)

Quentin, It's in the instruction selection, sorry I forgot to mention that. The Vreg class is GPR and an extra COPY is generated to copy from the GPR to the Base Reg, even though my 'mov' instruction has Base in the Register class list. On Fri, Jul 31, 2015 at 12:50 PM, Quentin Colombet <qcolombet at apple.com> wrote: > Hi Ryan, > > Could you check where those moves

On 19 Jul 2015, at 00:17, Dimitry Andric <dimitry at andric.com> wrote: > > On 17 Jul 2015, at 01:09, Hans Wennborg <hans at chromium.org> wrote: >> >> On Thu, Jul 16, 2015 at 3:47 PM, Dimitry Andric <dimitry at andric.com> wrote: >>> On 17 Jul 2015, at 00:31, Hans Wennborg <hans at chromium.org> wrote: >>>> >>>> Dear

Quentin, This is the issue. Somewhere prior to the constrainRegClass, it's assigning the GPRBase sub class of GPR to the MOV instruction, so it can't constrain it to Base and hence has to add the COPY. Now I just need to find out why it is ignoring the TableGen defined GPRBase for the MOV MI in favor of it's sub class GPR. Thanks. On Mon, Aug 24, 2015 at 8:34 PM, Ryan Taylor

AddRegisterOperand calls getVR and yes, I think an IMPLICIT_DEF is being generated. On Tue, Aug 25, 2015 at 2:40 PM, Quentin Colombet <qcolombet at apple.com> wrote: > > On Aug 25, 2015, at 11:05 AM, Ryan Taylor <ryta1203 at gmail.com> wrote: > > I have not tried 3.5, it's a significant amount of work to port from one > version to the next though, I did not

Here is the instruction in question: multiclass AD<string asmstr, SDPatternOperator OpNode, RegisterClass srcAReg, RegisterClass dstReg, ValueType srcAType, ValueType dstType, Operand ImmOd, ImmLeaf imm_type> { def REG_REG : SetADInOut<asmstr, srcAReg, dstReg, [(set dstReg:$dstD, (OpNode srcAReg:$srcA))]>; def IMM_REG :

I have not tried 3.5, it's a significant amount of work to port from one version to the next though, I did not personally do the 3.4 to 3.6 porting. I agree though, it was very strange that it suddenly just changed behavior. It looks like to me that InstrEmitter.cpp:getVR is the one assigning the virtual register no? Though this code in CreateVirtualRegisters: const TargetRegisterClass *RC

1. MOV16Copy_IMM_REG is the instruction matched, sorry. AD is the multiclass. The IMM in my case is a global. So you can see that GPRBaseRegs, GPRBaseRegs sets the registerclass for both the src and dst operands, in this case (MOV16Copy_IMM_REG) it's the dst. 2. Yes I agree, it most likely would. Honestly, this comes across like a bug, or unintended feature. It's adding an extra COPY to

Yes, you're probably right about the ID. The odd part is that I have other simpler instructions that use the same type of superset and it always, so far, matches correctly (it doesn't just pick GPRRegs all the time). Like I said, we can just 'fill in the gaps' with new MIs but that sure seems like a brush off solution. The td files would be so much cleaner if you could have a

> On Aug 22, 2015, at 9:10 AM, Ryan Taylor <ryta1203 at gmail.com> wrote: > > One last question regarding this please. > > Why aren't we simply changing the register class in AddRegisterOperand instead of building a new COPY? I admit I haven't thought this out but for my test cases so far this works just fine and reduces the number of ASM mov instructions that are